SN74AUC1G80DBVR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 day ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | SC-74A, SOT-753 |
| Number of Pins | 5 |
| Weight | 11.198062mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74AUC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 5 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 0.8V~2.7V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUC1G80 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Inverted |
| Polarity | Inverting |
| Supply Voltage-Max (Vsup) | 2.7V |
| Supply Voltage-Min (Vsup) | 0.8V |
| Number of Circuits | 1 |
| Number of Bits | 1 |
| Clock Frequency | 275MHz |
| Propagation Delay | 2.4 ns |
| Turn On Delay Time | 5 ns |
| Family | AUC |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 9mA 9mA |
| Max I(ol) | 0.009 A |
| Max Propagation Delay @ V, Max CL | 1.8ns @ 2.5V, 30pF |
| Prop. Delay@Nom-Sup | 3.9 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 2.5pF |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 200000000Hz |
| Height | 1.45mm |
| Length | 2.9mm |
| Width | 1.6mm |
| Thickness | 1.2mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74AUC1G80DBVR Overview
It is embeded in SC-74A, SOT-753 case. Package Cut Tape (CT)embeds it. T flip flop uses Invertedas the output. Positive Edgeis the trigger it is configured with. In this case, the electronic component is mounted in the way of Surface Mount. A voltage of 0.8V~2.7Vis used as the supply voltage. It is operating at -40°C~85°C TA. Logic flip flops of this type are classified as D-Type. In FPGA terms, D flip flop is a type of 74AUCseries FPGA. A frequency of 275MHzshould not be exceeded by its output. It consumes 10μA of quiescent current without being affected by external factors. In 5terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. You can search similar parts based on 74AUC1G80. A voltage of 1.2V provides power to the D latch. There is 2.5pF input capacitance for this T flip flop. Devices in the AUCfamily are electronic devices. This electronic part is mounted in the way of Surface Mount. The 5pins are designed into the board. This device exhibits a clock edge trigger type of Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. This flip flop is designed with 1 Bits. Vsup reaches its maximum value at 2.7V. Keeping the supply voltage (Vsup) above 0.8V is necessary for normal operation. Using 1 circuits, it is highly flexible. This D flip flop is well suited for TR based on its reliable performance.
SN74AUC1G80DBVR Features
Cut Tape (CT) package
74AUC series
5 pins
1 Bits
SN74AUC1G80DBVR Applications
There are a lot of Texas Instruments SN74AUC1G80DBVR Flip Flops applications.
- ESD protection
- Communications
- Synchronous counter
- Computers
- Control circuits
- Bounce elimination switch
- Frequency division
- Parallel data storage
- Shift Registers
- Data transfer
