SN74AUC1G80YZPR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 day ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 5-XFBGA, DSBGA |
| Number of Pins | 5 |
| Weight | 1.587573mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUC |
| JESD-609 Code | e1 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 5 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 0.8V~2.7V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUC1G80 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Inverted |
| Polarity | Inverting |
| Supply Voltage-Max (Vsup) | 2.7V |
| Supply Voltage-Min (Vsup) | 0.8V |
| Number of Circuits | 1 |
| Number of Bits | 1 |
| Clock Frequency | 275MHz |
| Propagation Delay | 2.4 ns |
| Turn On Delay Time | 5 ns |
| Family | AUC |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 9mA 9mA |
| Max I(ol) | 0.009 A |
| Max Propagation Delay @ V, Max CL | 1.8ns @ 2.5V, 30pF |
| Prop. Delay@Nom-Sup | 3.9 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 2.5pF |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 200000000Hz |
| Height | 500μm |
| Length | 1.75mm |
| Width | 1.25mm |
| Thickness | 310μm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74AUC1G80YZPR Overview
It is packaged in the way of 5-XFBGA, DSBGA. Package Tape & Reel (TR)embeds it. T flip flop is configured with an output of Inverted. It is configured with a trigger that uses Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A voltage of 0.8V~2.7Vis used as the supply voltage. It is operating at a temperature of -40°C~85°C TA. A flip flop of this type is classified as a D-Type. It is a type of FPGA belonging to the 74AUC series. You should not exceed 275MHzin its output frequency. It consumes 10μA of quiescent It has been determined that there have been 5 terminations. The 74AUC1G80 family contains this object. It is powered from a supply voltage of 1.2V. A JK flip flop with a 2.5pFfarad input capacitance is used here. An electronic device belonging to the family AUCcan be found here. It is mounted in the way of Surface Mount. It is designed with 5 pins. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. The design is based on 1bits. In this case, the maximum supply voltage (Vsup) reaches 2.7V. It is imperative that the supply voltage (Vsup) is maintained above 0.8Vin order to ensure normal operation. Due to its superior flexibility, it uses 1 circuits. In light of its reliable performance, this T flip flop is well suited for TR.
SN74AUC1G80YZPR Features
Tape & Reel (TR) package
74AUC series
5 pins
1 Bits
SN74AUC1G80YZPR Applications
There are a lot of Texas Instruments SN74AUC1G80YZPR Flip Flops applications.
- High Performance Logic for test systems
- ESD protection
- Counters
- Convert a momentary switch to a toggle switch
- Shift registers
- Computers
- 2 – Bit synchronous counter
- Matched Rise and Fall
- Parallel data storage
- Safety Clamp
