Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 3 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
8-LSSOP, 8-MSOP (0.110, 2.80mm Width) |
Number of Pins |
8 |
Weight |
23.388357mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74AUC |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
8 |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
CMOS |
Voltage - Supply |
0.8V~2.7V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
1.2V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74AUC2G79 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Non-Inverted |
Polarity |
Non-Inverting |
Number of Circuits |
2 |
Clock Frequency |
275MHz |
Propagation Delay |
2.4 ns |
Turn On Delay Time |
5 ns |
Family |
AUC |
Current - Quiescent (Iq) |
10μA |
Current - Output High, Low |
9mA 9mA |
Max I(ol) |
0.009 A |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
1.8ns @ 2.5V, 30pF |
Prop. Delay@Nom-Sup |
3.9 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
2.5pF |
Number of Output Lines |
1 |
Clock Edge Trigger Type |
Positive Edge |
Height |
1.3mm |
Length |
2.95mm |
Width |
2.8mm |
Thickness |
1.29mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74AUC2G79DCTR Overview
8-LSSOP, 8-MSOP (0.110, 2.80mm Width)is the packaging method. A package named Tape & Reel (TR)includes it. T flip flop uses Non-Invertedas its output configuration. It is configured with the trigger Positive Edge. Surface Mountis occupied by this electronic component. The supply voltage is set to 0.8V~2.7V. The operating temperature is -40°C~85°C TA. D-Typedescribes this flip flop. JK flip flop belongs to the 74AUCseries of FPGAs. A frequency of 275MHzshould not be exceeded by its output. As a result, it consumes 10μA quiescent current. Currently, there are 8 terminations. The 74AUC2G79family includes it. The power source is powered by 1.2V. A JK flip flop with a 2.5pFfarad input capacitance is used here. It is a member of the AUCfamily of D flip flop. This electronic part is mounted in the way of Surface Mount. As you can see from the design, it has pins with 8. This device's clock edge trigger type is Positive Edge. This RS flip flops is a part number FF/Latches. The superior flexibility of this circuit is achieved by using 2 circuits. Considering its reliability, this T flip flop is well suited for TR. The JK flip flop is with 1 output lines to operate.
SN74AUC2G79DCTR Features
Tape & Reel (TR) package
74AUC series
8 pins
SN74AUC2G79DCTR Applications
There are a lot of Texas Instruments SN74AUC2G79DCTR Flip Flops applications.
- Common Clocks
- Differential Individual
- Buffered Clock
- Bounce elimination switch
- Functionally equivalent to the MC10/100EL29
- EMI reduction circuitry
- Synchronous counter
- Asynchronous counter
- Load Control
- Power down protection