SN74AUC2G80YZPR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 2 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-XFBGA, DSBGA |
| Number of Pins | 8 |
| Weight | 2.296311mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74AUC |
| JESD-609 Code | e1 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 0.8V~2.7V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUC2G80 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Inverted |
| Polarity | Inverting |
| Number of Circuits | 2 |
| Clock Frequency | 275MHz |
| Propagation Delay | 2.4 ns |
| Turn On Delay Time | 5 ns |
| Family | AUC |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 9mA 9mA |
| Max I(ol) | 0.009 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 1.8ns @ 2.5V, 30pF |
| Prop. Delay@Nom-Sup | 3.9 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 2.5pF |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Height | 500μm |
| Length | 1.25mm |
| Width | 2.25mm |
| Thickness | 310μm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74AUC2G80YZPR Overview
As a result, it is packaged as 8-XFBGA, DSBGA. The Cut Tape (CT)package contains it. As configured, the output uses Inverted. Positive Edgeis the trigger it is configured with. There is an electronic component mounted in the way of Surface Mount. It operates with a supply voltage of 0.8V~2.7V. The operating temperature is -40°C~85°C TA. A flip flop of this type is classified as a D-Type. The FPGA belongs to the 74AUC series. A frequency of 275MHzshould be the maximum output frequency. As a result, it consumes 10μA of quiescent current without being affected by external factors. Terminations are 8. You can search similar parts based on 74AUC2G80. The power supply voltage is 1.2V. This T flip flop has a capacitance of 2.5pF farads at the input. It is a member of the AUCfamily of D flip flop. It is mounted by the way of Surface Mount. The electronic flip flop is designed with pins 8. In this device, the clock edge trigger type is Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. 2 circuits are used to achieve its superior flexibility. In view of its reliability, this D flip flop is a good fit for TR. The JK flip flop is with 1 output lines to operate.
SN74AUC2G80YZPR Features
Cut Tape (CT) package
74AUC series
8 pins
SN74AUC2G80YZPR Applications
There are a lot of Texas Instruments SN74AUC2G80YZPR Flip Flops applications.
- Latch-up performance
- Event Detectors
- ESCC
- Communications
- Balanced Propagation Delays
- Power down protection
- Storage Registers
- ESD performance
- Patented noise
- Dynamic threshold performance
