SN74AUC32374GKER
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 96-LFBGA |
| Number of Pins | 96 |
| Weight | 174.20782mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUC |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 96 |
| Type | D-Type |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 0.8V~2.7V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 235 |
| Supply Voltage | 1.2V |
| Base Part Number | 74AUC32374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 4 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 2.7V |
| Power Supplies | 1.2/2.5V |
| Load Capacitance | 15pF |
| Number of Ports | 2 |
| Number of Bits | 8 |
| Clock Frequency | 250MHz |
| Propagation Delay | 2.8 ns |
| Turn On Delay Time | 7.3 ns |
| Family | AUC |
| Current - Quiescent (Iq) | 40μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 9mA 9mA |
| Max I(ol) | 0.005 A |
| Max Propagation Delay @ V, Max CL | 2.2ns @ 2.5V, 30pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Number of Input Lines | 8 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 250000000Hz |
| Length | 13.5mm |
| Width | 5.5mm |
| Radiation Hardening | No |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Contains Lead |
SN74AUC32374GKER Overview
96-LFBGAis the packaging method. Package Tape & Reel (TR)embeds it. T flip flop uses Tri-State, Non-Invertedas its output configuration. This trigger is configured to use Positive Edge. It is mounted in the way of Surface Mount. A voltage of 0.8V~2.7Vis required for its operation. It is at -40°C~85°C TAdegrees Celsius that the system is operating. Logic flip flops of this type are classified as D-Type. This type of FPGA is a part of the 74AUC series. It should not exceed 250MHzin terms of its output frequency. D latch consists of 4 elements. It consumes 40μA of quiescent 96terminations have occurred. The 74AUC32374family includes it. A voltage of 1.2V is used as the power supply for this D latch. Its input capacitance is 3pF farads. An electronic device belonging to the family AUCcan be found here. There is an electronic component mounted in the way of Surface Mount. The electronic flip flop is designed with pins 96. This device's clock edge trigger type is Positive Edge. The part is included in FF/Latches. 8bits are used in its design. As soon as Vsup reaches 2.7V, the maximum supply voltage is reached. This D flip flop is well suited for TAPE AND REEL based on its reliable performance. There are 1.2/2.5V power supplies attached to it. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. Currently, there are 8 lines of input.
SN74AUC32374GKER Features
Tape & Reel (TR) package
74AUC series
96 pins
8 Bits
1.2/2.5V power supplies
SN74AUC32374GKER Applications
There are a lot of Texas Instruments SN74AUC32374GKER Flip Flops applications.
- Storage registers
- Data storage
- 2 – Bit synchronous counter
- ESD protection
- Communications
- Bounce elimination switch
- Bus hold
- Storage Registers
- Registers
- ESCC
