SN74AUCH16374ZQLR
| Parameters | |
|---|---|
| Lead Free | Lead Free |
| Lifecycle Status | LIFEBUY (Last Updated: 1 day ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 56-VFBGA |
| Number of Pins | 56 |
| Weight | 58.28662mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUCH |
| JESD-609 Code | e1 |
| Pbfree Code | yes |
| Part Status | Last Time Buy |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 56 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 0.8V~2.7V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUCH16374 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Load Capacitance | 15pF |
| Number of Ports | 2 |
| Number of Bits | 16 |
| Clock Frequency | 250MHz |
| Propagation Delay | 2.8 ns |
| Turn On Delay Time | 7.3 ns |
| Family | AUC |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 20μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 9mA 9mA |
| Max I(ol) | 0.009 A |
| Max Propagation Delay @ V, Max CL | 2.2ns @ 2.5V, 30pF |
| Prop. Delay@Nom-Sup | 4.5 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Number of Output Lines | 8 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Height | 1mm |
| Length | 7mm |
| Width | 4.5mm |
| Thickness | 750μm |
| RoHS Status | ROHS3 Compliant |
SN74AUCH16374ZQLR Overview
In the form of 56-VFBGA, it has been packaged. It is included in the package Tape & Reel (TR). This output is configured with Tri-State, Non-Inverted. This trigger uses the value Positive Edge. Surface Mountmounts this electrical part. A voltage of 0.8V~2.7Vis used as the supply voltage. The operating temperature is -40°C~85°C TA. It is an electronic flip flop with the type D-Type. JK flip flop belongs to the 74AUCHseries of FPGAs. You should not exceed 250MHzin its output frequency. A total of 2 elements are present. As a result, it consumes 20μA quiescent current. 56terminations have occurred. JK flip flop belongs to 74AUCH16374 family. A voltage of 1.2V is used as the power supply for this D latch. Input capacitance of this device is 3pF farads. A device of this type belongs to the family of AUC. There is an electronic part that is mounted in the way of Surface Mount. This board is designed with 56pins on it. It has a clock edge trigger type of Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. It is designed with 16bits. Due to its reliability, this T flip flop is well suited for TR. This flip flop has a total of 2ports. There are 8 output lines on it.
SN74AUCH16374ZQLR Features
Tape & Reel (TR) package
74AUCH series
56 pins
16 Bits
SN74AUCH16374ZQLR Applications
There are a lot of Texas Instruments SN74AUCH16374ZQLR Flip Flops applications.
- Differential Individual
- 2 – Bit synchronous counter
- Buffer registers
- Communications
- Modulo – n – counter
- Individual Asynchronous Resets
- Convert a momentary switch to a toggle switch
- Storage Registers
- Bus hold
- Data transfer
