SN74AUP1G74DCUR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-VFSOP (0.091, 2.30mm Width) |
| Number of Pins | 8 |
| Weight | 29.993795mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUP |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 0.8V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.5mm |
| Base Part Number | 74AUP1G74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Channels | 1 |
| Load Capacitance | 30pF |
| Output Current | 4mA |
| Number of Bits | 1 |
| Clock Frequency | 100MHz |
| Propagation Delay | 27 ns |
| Quiescent Current | 500nA |
| Turn On Delay Time | 4 ns |
| Family | AUP/ULP/V |
| Logic Function | AND, D-Type |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 4mA 4mA |
| Max I(ol) | 0.004 A |
| Max Propagation Delay @ V, Max CL | 7ns @ 3.3V, 30pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 1.5pF |
| Power Supply Current-Max (ICC) | 0.0009mA |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 40000000Hz |
| Height | 900μm |
| Length | 2.3mm |
| Width | 2mm |
| Thickness | 850μm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74AUP1G74DCUR Overview
The flip flop is packaged in a case of 8-VFSOP (0.091, 2.30mm Width). It is included in the package Tape & Reel (TR). T flip flop uses Differentialas its output configuration. Positive Edgeis the trigger it is configured with. This electronic part is mounted in the way of Surface Mount. With a supply voltage of 0.8V~3.6V volts, it operates. Temperature is set to -40°C~85°C TA. There is D-Type type of electronic flip flop associated with this device. In FPGA terms, D flip flop is a type of 74AUPseries FPGA. It should not exceed 100MHzin terms of its output frequency. There are 8 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. D latch belongs to the 74AUP1G74 family. The power supply voltage is 1.2V. The input capacitance of this T flip flop is 1.5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. Devices in the AUP/ULP/Vfamily are electronic devices. The electronic part is mounted in the way of Surface Mount. As you can see from the design, it has pins with 8. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. This RS flip flops is a part number FF/Latches. It is designed with a number of bits of 1. It reaches 3.6Vwhen the maximum supply voltage (Vsup) is applied. A reliable performance of this D flip flop makes it well suited for use in TR. With an output current of 4mA, this device offers maximum design flexibility. 500nAquiescent current consumed. There are 1 channels available.
SN74AUP1G74DCUR Features
Tape & Reel (TR) package
74AUP series
8 pins
1 Bits
SN74AUP1G74DCUR Applications
There are a lot of Texas Instruments SN74AUP1G74DCUR Flip Flops applications.
- Data storage
- Memory
- Single Down Count-Control Line
- CMOS Process
- Memory
- Consumer
- Synchronous counter
- Patented noise
- EMI reduction circuitry
- Bus hold
