SN74AUP1G74RSER
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 week ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-UFQFN |
| Number of Pins | 8 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUP |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 0.8V~3.6V |
| Terminal Position | QUAD |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.5mm |
| Base Part Number | 74AUP1G74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Circuits | 1 |
| Load Capacitance | 30pF |
| Number of Bits | 1 |
| Clock Frequency | 100MHz |
| Propagation Delay | 5 ns |
| Turn On Delay Time | 4 ns |
| Family | AUP/ULP/V |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 500nA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 4mA 4mA |
| Max I(ol) | 0.004 A |
| Max Propagation Delay @ V, Max CL | 7ns @ 3.3V, 30pF |
| Prop. Delay@Nom-Sup | 27 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 1.5pF |
| Power Supply Current-Max (ICC) | 0.0009mA |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 40000000Hz |
| Height | 600μm |
| Length | 1.5mm |
| Width | 1.5mm |
| Thickness | 550μm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74AUP1G74RSER Overview
The item is packaged in 8-UFQFNcases. Package Tape & Reel (TR)embeds it. T flip flop uses Differentialas its output configuration. The trigger configured with it uses Positive Edge. Surface Mountmounts this electrical part. The JK flip flop operates at 0.8V~3.6Vvolts. Temperature is set to -40°C~85°C TA. It belongs to the type D-Typeof flip flops. It is a type of FPGA belonging to the 74AUP series. Its output frequency should not exceed 100MHz. As a result, it consumes 500nA of quiescent current without being affected by external factors. It has been determined that there have been 8 terminations. Members of the 74AUP1G74family make up this object. Power is supplied from a voltage of 1.2V volts. Its input capacitance is 1.5pF farads. In terms of electronic devices, this device belongs to the AUP/ULP/Vfamily of devices. There is an electronic part that is mounted in the way of Surface Mount. A total of 8pins are provided on this board. Its clock edge trigger type is Positive Edge. This device is part of the FF/Latchesbase part number family. It is designed with a number of bits of 1. Vsup reaches 3.6V, the maximal supply voltage. Despite its superior flexibility, it relies on 1 circuits to achieve it. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TR.
SN74AUP1G74RSER Features
Tape & Reel (TR) package
74AUP series
8 pins
1 Bits
SN74AUP1G74RSER Applications
There are a lot of Texas Instruments SN74AUP1G74RSER Flip Flops applications.
- Load Control
- Digital electronics systems
- Convert a momentary switch to a toggle switch
- Counters
- Clock pulse
- Consumer
- Functionally equivalent to the MC10/100EL29
- Computing
- Frequency Dividers
- Buffered Clock
