SN74AUP1G80DBVRG4
| Parameters | |
|---|---|
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 260000000Hz |
| Height | 1.45mm |
| Length | 2.9mm |
| Width | 1.6mm |
| Thickness | 1.2mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 week ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | SC-74A, SOT-753 |
| Number of Pins | 5 |
| Weight | 11.198062mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUP |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 5 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 0.8V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUP1G80 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Inverted |
| Polarity | Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 0.8V |
| Number of Circuits | 1 |
| Load Capacitance | 30pF |
| Number of Bits | 1 |
| Clock Frequency | 260MHz |
| Propagation Delay | 20.7 ns |
| Turn On Delay Time | 3.1 ns |
| Family | AUP/ULP/V |
| Current - Quiescent (Iq) | 0.9μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 4mA 4mA |
| Max I(ol) | 0.004 A |
| Max Propagation Delay @ V, Max CL | 6.4ns @ 3.3V, 30pF |
| Prop. Delay@Nom-Sup | 28.7 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 1.5pF |
| Power Supply Current-Max (ICC) | 0.0009mA |
| fmax-Min | 260 MHz |
SN74AUP1G80DBVRG4 Overview
The flip flop is packaged in a case of SC-74A, SOT-753. D flip flop is included in the Tape & Reel (TR)package. T flip flop is configured with an output of Inverted. JK flip flop uses Positive Edgeas the trigger. Surface Mountmounts this electrical part. A voltage of 0.8V~3.6Vis used as the supply voltage. In this case, the operating temperature is -40°C~85°C TA. D-Typeis the type of this D latch. This type of FPGA is a part of the 74AUP series. A frequency of 260MHzshould be the maximum output frequency. There is a consumption of 0.9μAof quiescent energy. A total of 5terminations have been recorded. D latch belongs to the 74AUP1G80 family. Power is supplied from a voltage of 1.2V volts. A JK flip flop with a 1.5pFfarad input capacitance is used here. This D flip flop belongs to the family of AUP/ULP/V. It is mounted by the way of Surface Mount. 5pins are included in its design. There is a clock edge trigger type of Positive Edgeon this device. The part is included in FF/Latches. Flip flops designed with 1bits are used in this part. Vsup reaches 3.6V, the maximal supply voltage. Normally, the supply voltage (Vsup) should be above 0.8V. Using 1 circuits, it is highly flexible. In light of its reliable performance, this T flip flop is well suited for TR.
SN74AUP1G80DBVRG4 Features
Tape & Reel (TR) package
74AUP series
5 pins
1 Bits
SN74AUP1G80DBVRG4 Applications
There are a lot of Texas Instruments SN74AUP1G80DBVRG4 Flip Flops applications.
- Clock pulse
- Control circuits
- Cold spare funcion
- Buffer registers
- Count Modes
- ATE
- Power down protection
- Storage Registers
- Dynamic threshold performance
- Common Clocks
