SN74AUP1G80DCKR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 5-TSSOP, SC-70-5, SOT-353 |
| Number of Pins | 5 |
| Weight | 2.494758mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUP |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 5 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 0.8V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Base Part Number | 74AUP1G80 |
| Function | Standard |
| Output Type | Inverted |
| Polarity | Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 0.8V |
| Number of Circuits | 1 |
| Load Capacitance | 30pF |
| Output Current | 20mA |
| Number of Bits | 1 |
| Clock Frequency | 260MHz |
| Propagation Delay | 20.7 ns |
| Quiescent Current | 500nA |
| Turn On Delay Time | 3.1 ns |
| Family | AUP/ULP/V |
| Current - Quiescent (Iq) | 0.9μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 4mA 4mA |
| Max I(ol) | 0.004 A |
| Max Propagation Delay @ V, Max CL | 6.4ns @ 3.3V, 30pF |
| Prop. Delay@Nom-Sup | 28.7 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 1.5pF |
| Power Supply Current-Max (ICC) | 0.0009mA |
| fmax-Min | 260 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 260000000Hz |
| Height | 1.1mm |
| Length | 2mm |
| Width | 1.25mm |
| Thickness | 900μm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74AUP1G80DCKR Overview
The package is in the form of 5-TSSOP, SC-70-5, SOT-353. D flip flop is embedded in the Tape & Reel (TR) package. It is configured with Invertedas an output. This trigger uses the value Positive Edge. There is an electric part mounted in the way of Surface Mount. A voltage of 0.8V~3.6Vis required for its operation. Temperature is set to -40°C~85°C TA. It belongs to the type D-Typeof flip flops. JK flip flop is a part of the 74AUPseries of FPGAs. There should be no greater frequency than 260MHzon its output. Despite external influences, it consumes 0.9μAof quiescent current. A total of 5 terminations have been made. It is a member of the 74AUP1G80 family. The power supply voltage is 1.2V. Its input capacitance is 1.5pF farads. It is a member of the AUP/ULP/Vfamily of D flip flop. The electronic part is mounted in the way of Surface Mount. Basically, it is designed with a set of 5 pins. This device exhibits a clock edge trigger type of Positive Edge. This device is part of the FF/Latchesbase part number family. The flip flop is designed with 1bits. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. Normal operation requires a supply voltage (Vsup) above 0.8V. The superior flexibility is achieved through the use of 1 circuits. This D flip flop is well suited for TR based on its reliable performance. It offers maximum design flexibility with its output current of 20mA. 500nAquiescent current consumed.
SN74AUP1G80DCKR Features
Tape & Reel (TR) package
74AUP series
5 pins
1 Bits
SN74AUP1G80DCKR Applications
There are a lot of Texas Instruments SN74AUP1G80DCKR Flip Flops applications.
- Data storage
- Set-reset capability
- ATE
- Automotive
- Instrumentation
- Buffered Clock
- Consumer
- Divide a clock signal by 2 or 4
- Storage registers
- Parallel data storage
