Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 2 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-SOIC (0.209, 5.30mm Width) |
Number of Pins |
14 |
Weight |
208.312296mg |
Operating Temperature |
0°C~70°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74F |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
14 |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
TTL |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Base Part Number |
74F74 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Operating Supply Voltage |
5V |
Polarity |
Non-Inverting |
Power Supplies |
5V |
Number of Circuits |
2 |
Load Capacitance |
50pF |
Output Current |
20mA |
Clock Frequency |
145MHz |
Propagation Delay |
10.5 ns |
Turn On Delay Time |
3 ns |
Family |
F/FAST |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
16mA |
Current - Output High, Low |
1mA 20mA |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
8ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Number of Output Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Height |
2mm |
Length |
10.3mm |
Width |
5.3mm |
Thickness |
1.95mm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74F74NSR Overview
The item is packaged in 14-SOIC (0.209, 5.30mm Width)cases. You can find it in the Tape & Reel (TR)package. T flip flop uses Differentialas its output configuration. JK flip flop uses Positive Edgeas the trigger. There is an electrical part that is mounted in the way of Surface Mount. It operates with a supply voltage of 4.5V~5.5V. In this case, the operating temperature is 0°C~70°C TA. Logic flip flops of this type are classified as D-Type. JK flip flop is a part of the 74Fseries of FPGAs. Its output frequency should not exceed 145MHz. There is 16mA quiescent consumption. There are 14 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. This D latch belongs to the family of 74F74. A voltage of 5V provides power to the D latch. It belongs to the family of electronic devices known as F/FAST. This electronic part is mounted in the way of Surface Mount. 14pins are included in its design. It has a clock edge trigger type of Positive Edge. This RS flip flops is a part number FF/Latches. 2 circuits are used to achieve its superior flexibility. As a result of its reliability, this D flip flop is ideally suited for TR. The D latch operates on 5V volts. If high efficiency is desired, the supply voltage should be kept at 5V. The output current of 20mA makes it feature maximum design flexibility. It is designed with 3 output lines.
SN74F74NSR Features
Tape & Reel (TR) package
74F series
14 pins
5V power supplies
SN74F74NSR Applications
There are a lot of Texas Instruments SN74F74NSR Flip Flops applications.
- Convert a momentary switch to a toggle switch
- Common Clocks
- Divide a clock signal by 2 or 4
- Storage Registers
- Test & Measurement
- Frequency Divider circuits
- QML qualified product
- Data Synchronizers
- Communications
- Storage registers