SN74HC109D
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Weight | 141.690917mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74HC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | JK Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Additional Feature | DUMMY VAL |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Base Part Number | 74HC109 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Channels | 2 |
| Load Capacitance | 50pF |
| Output Current | 5.2mA |
| Clock Frequency | 60MHz |
| Propagation Delay | 175 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 12 ns |
| Family | HC/UH |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Output High, Low | 5.2mA 5.2mA |
| Max I(ol) | 0.004 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 30ns @ 6V, 50pF |
| Prop. Delay@Nom-Sup | 58 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Schmitt Trigger | No |
| Power Supply Current-Max (ICC) | 0.04mA |
| Number of Output Lines | 3 |
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.75mm |
| Length | 9.9mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74HC109D Overview
The flip flop is packaged in 16-SOIC (0.154, 3.90mm Width). The package Tubecontains it. T flip flop uses Differentialas the output. Positive Edgeis the trigger it is configured with. Surface Mountis occupied by this electronic component. A supply voltage of 2V~6V is required for operation. Temperature is set to -40°C~85°C TA. The type of this D latch is JK Type. It is a type of FPGA belonging to the 74HC series. Its output frequency should not exceed 60MHz Hz. There are 16 terminations,It is a member of the 74HC109 family. A voltage of 5V provides power to the D latch. This T flip flop has a capacitance of 3pF farads at the input. In this case, the D flip flop belongs to the HC/UHfamily. The electronic part is mounted in the way of Surface Mount. The electronic flip flop is designed with pins 16. The clock edge trigger type for this device is Positive Edge. It is part of the FF/Latchesbase part number family. As soon as Vsup reaches 6V, the maximum supply voltage is reached. For normal operation, the supply voltage (Vsup) should be above 2V. For high efficiency, the supply voltage should be kept at 5V. The output current of 5.2mA makes it feature maximum design flexibility. There are no output lines on the JK flip flop. In terms of quiescent current, it consumes 4μA . In addition, you can refer to the additinal DUMMY VAL of the D latch. Currently, there are 2 channels available.
SN74HC109D Features
Tube package
74HC series
16 pins
SN74HC109D Applications
There are a lot of Texas Instruments SN74HC109D Flip Flops applications.
- Modulo – n – counter
- Data transfer
- Single Down Count-Control Line
- Clock pulse
- Computing
- Divide a clock signal by 2 or 4
- ATE
- Latch-up performance
- Memory
- CMOS Process
