Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 5 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
16-SOIC (0.154, 3.90mm Width) |
Number of Pins |
16 |
Weight |
141.690917mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Cut Tape (CT) |
Series |
74HC |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
16 |
ECCN Code |
EAR99 |
Type |
JK Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Additional Feature |
DUMMY VAL |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Base Part Number |
74HC109 |
Function |
Set(Preset) and Reset |
Number of Outputs |
3 |
Output Type |
Differential |
Operating Supply Voltage |
5V |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
6V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
2 |
Load Capacitance |
50pF |
Output Current |
5.2mA |
Clock Frequency |
60MHz |
Propagation Delay |
175 ns |
Quiescent Current |
4μA |
Turn On Delay Time |
12 ns |
Family |
HC/UH |
Logic Function |
AND, Flip-Flop, JK-Type |
Current - Output High, Low |
5.2mA 5.2mA |
Max I(ol) |
0.004 A |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
30ns @ 6V, 50pF |
Prop. Delay@Nom-Sup |
58 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
3pF |
Schmitt Trigger |
No |
Power Supply Current-Max (ICC) |
0.04mA |
Clock Edge Trigger Type |
Positive Edge |
Height |
1.75mm |
Length |
9.9mm |
Width |
3.91mm |
Thickness |
1.58mm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74HC109DR Overview
16-SOIC (0.154, 3.90mm Width)is the packaging method. The Cut Tape (CT)package contains it. It is configured with Differentialas an output. It is configured with a trigger that uses a value of Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. The supply voltage is set to 2V~6V. It is operating at -40°C~85°C TA. Logic flip flops of this type are classified as JK Type. FPGAs belonging to the 74HCseries contain this type of chip. There should be no greater frequency than 60MHzon its output. It has been determined that there have been 16 terminations. You can search similar parts based on 74HC109. A voltage of 5V provides power to the D latch. A 3pFfarad input capacitance is provided by this T flip flop. In this case, the D flip flop belongs to the HC/UHfamily. In this case, the electronic component is mounted in the way of Surface Mount. As you can see from the design, it has pins with 16. The clock edge trigger type for this device is Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. Vsup reaches its maximum value at 6V. Normally, the supply voltage (Vsup) should be above 2V. To achieve this superior flexibility, 2 circuits are used. Due to its reliability, this T flip flop is well suited for TR. For high efficiency, the supply voltage should be kept at 5V. This T flip flop features a maximum design flexibility due to its output current of 5.2mA. 4μAquiescent current consumed. It is also characterized by DUMMY VAL.
SN74HC109DR Features
Cut Tape (CT) package
74HC series
16 pins
SN74HC109DR Applications
There are a lot of Texas Instruments SN74HC109DR Flip Flops applications.
- Load Control
- Supports Live Insertion
- Memory
- Frequency Dividers
- Reduced system switching noise
- Registers
- Buffer registers
- Control circuits
- Synchronous counter
- Divide a clock signal by 2 or 4