Parameters |
Thickness |
1.58mm |
Radiation Hardening |
No |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 2 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
16-SOIC (0.154, 3.90mm Width) |
Number of Pins |
16 |
Weight |
141.690917mg |
Operating Temperature |
0°C~70°C TA |
Packaging |
Tube |
Series |
74LS |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
16 |
Type |
JK Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Additional Feature |
INVERTED K INPUT |
Subcategory |
FF/Latches |
Technology |
TTL |
Voltage - Supply |
4.75V~5.25V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Base Part Number |
74LS109 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Operating Supply Voltage |
5V |
Polarity |
Non-Inverting |
Power Supplies |
5V |
Number of Circuits |
2 |
Output Current |
8mA |
Clock Frequency |
33MHz |
Propagation Delay |
40 ns |
Turn On Delay Time |
13 ns |
Family |
LS |
Logic Function |
AND, Flip-Flop, JK-Type |
Current - Output High, Low |
400μA 8mA |
Max I(ol) |
0.008 A |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
40ns @ 5V, 15pF |
Trigger Type |
Positive Edge |
Schmitt Trigger |
No |
Number of Input Lines |
5 |
Clock Edge Trigger Type |
Positive Edge |
Height |
1.75mm |
Length |
9.9mm |
Width |
3.91mm |
SN74LS109AD Overview
It is embeded in 16-SOIC (0.154, 3.90mm Width) case. D flip flop is embedded in the Tube package. There is a Differentialoutput configured with it. JK flip flop uses Positive Edgeas the trigger. Surface Mountis occupied by this electronic component. Powered by a 4.75V~5.25Vvolt supply, it operates as follows. In this case, the operating temperature is 0°C~70°C TA. The type of this D latch is JK Type. JK flip flop is a part of the 74LSseries of FPGAs. It should not exceed 33MHzin terms of its output frequency. There are 16 terminations,Members of the 74LS109family make up this object. A voltage of 5V is used to power it. LSis the family of this D flip flop. Electronic part Surface Mountis mounted in the way. With its 16pins, it is designed to work with most electronic flip flops. This device's clock edge trigger type is Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. Its flexibility is enhanced by 2 circuits. A total of 5V power supplies are needed to run it. The supply voltage should be maintained at 5V for high efficiency. This T flip flop features a maximum design flexibility due to its output current of 8mA. The number of input lines is 5. It is also characterized by INVERTED K INPUT.
SN74LS109AD Features
Tube package
74LS series
16 pins
5V power supplies
SN74LS109AD Applications
There are a lot of Texas Instruments SN74LS109AD Flip Flops applications.
- Individual Asynchronous Resets
- Computing
- Clock pulse
- Buffer registers
- Frequency Divider circuits
- Cold spare funcion
- Frequency division
- Power down protection
- ESCC
- Differential Individual