SN74LS112AD
| Parameters | |
|---|---|
| Family | LS |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Quiescent (Iq) | 6mA |
| Current - Output High, Low | 400μA 8mA |
| Max I(ol) | 0.008 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 20ns @ 5V, 15pF |
| Trigger Type | Negative Edge |
| Schmitt Trigger | No |
| Power Supply Current-Max (ICC) | 6mA |
| Number of Input Lines | 5 |
| Clock Edge Trigger Type | Negative Edge |
| Max Frequency@Nom-Sup | 30000000Hz |
| Height | 1.75mm |
| Length | 9.9mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Weight | 141.690917mg |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tube |
| Series | 74LS |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | JK Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | TTL |
| Voltage - Supply | 4.75V~5.25V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Base Part Number | 74LS112 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Power Supplies | 5V |
| Number of Circuits | 2 |
| Output Current | 8mA |
| Clock Frequency | 45MHz |
| Propagation Delay | 20 ns |
| Turn On Delay Time | 15 ns |
SN74LS112AD Overview
It is packaged in the way of 16-SOIC (0.154, 3.90mm Width). Package Tubeembeds it. Differentialis the output configured for it. The trigger it is configured with uses Negative Edge. Surface Mountmounts this electrical part. A voltage of 4.75V~5.25Vis used as the supply voltage. Temperature is set to 0°C~70°C TA. JK Typedescribes this flip flop. In this case, it is a type of FPGA belonging to the 74LS series. A frequency of 45MHzshould be the maximum output frequency. As a result, it consumes 6mA quiescent current. In 16terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The object belongs to the 74LS112 family. The D flip flop is powered by a voltage of 5V . The electronic device belongs to the LSfamily. This electronic part is mounted in the way of Surface Mount. The 16pins are designed into the board. Its clock edge trigger type is Negative Edge. It is included in FF/Latches. 2 circuits are used to achieve its superior flexibility. It operates from 5V power supplies. For high efficiency, the supply voltage should be kept at 5V. The output current of 8mA makes it feature maximum design flexibility. A total of 5input lines have been provided.
SN74LS112AD Features
Tube package
74LS series
16 pins
5V power supplies
SN74LS112AD Applications
There are a lot of Texas Instruments SN74LS112AD Flip Flops applications.
- Reduced system switching noise
- Dynamic threshold performance
- Latch
- Instrumentation
- Latch-up performance
- Frequency Dividers
- Digital electronics systems
- Set-reset capability
- Divide a clock signal by 2 or 4
- Single Down Count-Control Line
