Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 1 week ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
16-SOIC (0.154, 3.90mm Width) |
Number of Pins |
16 |
Weight |
141.690917mg |
Operating Temperature |
0°C~70°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74LS |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
16 |
Type |
JK Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
TTL |
Voltage - Supply |
4.75V~5.25V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74LS112 |
Function |
Set(Preset) and Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Operating Supply Voltage |
5V |
Polarity |
Non-Inverting |
Power Supplies |
5V |
Number of Circuits |
2 |
Output Current |
8mA |
Clock Frequency |
45MHz |
Propagation Delay |
20 ns |
Turn On Delay Time |
15 ns |
Family |
LS |
Logic Function |
AND, Flip-Flop, JK-Type |
Current - Quiescent (Iq) |
6mA |
Current - Output High, Low |
400μA 8mA |
Max I(ol) |
0.008 A |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
20ns @ 5V, 15pF |
Trigger Type |
Negative Edge |
Schmitt Trigger |
No |
Power Supply Current-Max (ICC) |
6mA |
Number of Input Lines |
5 |
Clock Edge Trigger Type |
Negative Edge |
Max Frequency@Nom-Sup |
30000000Hz |
Height |
1.75mm |
Length |
9.9mm |
Width |
3.91mm |
Thickness |
1.58mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74LS112ADRE4 Overview
16-SOIC (0.154, 3.90mm Width)is the way it is packaged. D flip flop is included in the Tape & Reel (TR)package. Differentialis the output configured for it. It is configured with a trigger that uses a value of Negative Edge. Surface Mountis occupied by this electronic component. A voltage of 4.75V~5.25Vis used as the supply voltage. It is operating at a temperature of 0°C~70°C TA. This D latch has the type JK Type. In this case, it is a type of FPGA belonging to the 74LS series. You should not exceed 45MHzin its output frequency. As a result, it consumes 6mA quiescent current. There are 16 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The 74LS112 family contains this object. Power is provided by a 5V supply. LSis the family of this D flip flop. A part of the electronic system is mounted in the way of Surface Mount. Basically, it is designed with a set of 16 pins. The clock edge trigger type for this device is Negative Edge. There is a base part number FF/Latchesfor the RS flip flops. Its superior flexibility is attributed to its use of 2 circuits. This D flip flop is well suited for TR based on its reliable performance. There are 5V power supplies attached to it. High efficiency requires the supply voltage to be maintained at 5V. As a result of its output current of 8mA, it is very flexible in terms of design. 5input lines are available for you to choose from.
SN74LS112ADRE4 Features
Tape & Reel (TR) package
74LS series
16 pins
5V power supplies
SN74LS112ADRE4 Applications
There are a lot of Texas Instruments SN74LS112ADRE4 Flip Flops applications.
- Automotive
- High Performance Logic for test systems
- Asynchronous counter
- Matched Rise and Fall
- Modulo – n – counter
- Bus hold
- Registers
- Digital electronics systems
- Balanced 24 mA output drivers
- Load Control