Parameters |
Height |
1.75mm |
Length |
9.9mm |
Width |
3.91mm |
Thickness |
1.58mm |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 3 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
16-SOIC (0.154, 3.90mm Width) |
Number of Pins |
16 |
Weight |
141.690917mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74LV |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
16 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
2V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.5V |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74LV174 |
Function |
Master Reset |
Qualification Status |
Not Qualified |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
7 |
Load Capacitance |
50pF |
Output Current |
12mA |
Clock Frequency |
180MHz |
Propagation Delay |
20.6 ns |
Turn On Delay Time |
3 ns |
Family |
LV/LV-A/LVX/H |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
20μA |
Current - Output High, Low |
12mA 12mA |
Number of Bits per Element |
6 |
Max Propagation Delay @ V, Max CL |
9.2ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
1.7pF |
Number of Input Lines |
2 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
50000000Hz |
SN74LV174AD Overview
In the form of 16-SOIC (0.154, 3.90mm Width), it has been packaged. It is included in the package Tube. It is configured with Non-Invertedas an output. The trigger it is configured with uses Positive Edge. Surface Mountis in the way of this electric part. The JK flip flop operates at 2V~5.5Vvolts. In this case, the operating temperature is -40°C~85°C TA. This logic flip flop is classified as type D-Type. FPGAs belonging to the 74LVseries contain this type of chip. You should not exceed 180MHzin the output frequency of the device. In total, there are 1 elements. There is a consumption of 20μAof quiescent energy. In 16terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. Members of the 74LV174family make up this object. It is powered by a voltage of 2.5V . The input capacitance of this JK flip flopis 1.7pF farads. In terms of electronic devices, this device belongs to the LV/LV-A/LVX/Hfamily of devices. There is an electronic part that is mounted in the way of Surface Mount. The electronic flip flop is designed with pins 16. It has a clock edge trigger type of Positive Edge. The part you are looking for is included in FF/Latches. As soon as Vsup reaches 5.5V, the maximum supply voltage is reached. The supply voltage (Vsup) should be kept above 2V for normal operation. Despite its superior flexibility, it relies on 7 circuits to achieve it. The D latch operates on 3.3V volts. This T flip flop features a maximum design flexibility due to its output current of 12mA. It has 2lines.
SN74LV174AD Features
Tube package
74LV series
16 pins
3.3V power supplies
SN74LV174AD Applications
There are a lot of Texas Instruments SN74LV174AD Flip Flops applications.
- Frequency division
- Frequency Dividers
- Synchronous counter
- Circuit Design
- Functionally equivalent to the MC10/100EL29
- EMI reduction circuitry
- Guaranteed simultaneous switching noise level
- Storage Registers
- QML qualified product
- Clock pulse