Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 4 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
16-TFSOP (0.173, 4.40mm Width) |
Number of Pins |
16 |
Weight |
41.900595mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74LV |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
16 |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
CMOS |
Voltage - Supply |
2V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.5V |
Terminal Pitch |
0.4mm |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74LV174 |
Function |
Master Reset |
Qualification Status |
Not Qualified |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
7 |
Load Capacitance |
50pF |
Output Current |
12mA |
Clock Frequency |
180MHz |
Propagation Delay |
20.6 ns |
Turn On Delay Time |
3 ns |
Family |
LV/LV-A/LVX/H |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
20μA |
Current - Output High, Low |
12mA 12mA |
Number of Bits per Element |
6 |
Max Propagation Delay @ V, Max CL |
9.2ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
1.7pF |
Number of Input Lines |
2 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
50000000Hz |
Height |
1.2mm |
Length |
3.6mm |
Width |
4.4mm |
Thickness |
1.05mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74LV174ADGVR Overview
The flip flop is packaged in 16-TFSOP (0.173, 4.40mm Width). Package Tape & Reel (TR)embeds it. Currently, the output is configured to use Non-Inverted. Positive Edgeis the trigger it is configured with. In this case, the electronic component is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 2V~5.5V volts. The operating temperature is -40°C~85°C TA. It is an electronic flip flop with the type D-Type. It is a type of FPGA belonging to the 74LV series. You should not exceed 180MHzin the output frequency of the device. In total, there are 1 elements. As a result, it consumes 20μA quiescent current and is not affected by external forces. The number of terminations is 16. The 74LV174 family contains it. Power is provided by a 2.5V supply. This T flip flop has a capacitance of 1.7pF farads at the input. An electronic device belonging to the family LV/LV-A/LVX/Hcan be found here. Electronic part Surface Mountis mounted in the way. The electronic flip flop is designed with pins 16. It has a clock edge trigger type of Positive Edge. This device is part of the FF/Latchesbase part number family. 5.5Vis the maximum supply voltage (Vsup). It is imperative that the supply voltage (Vsup) is maintained above 2Vin order to ensure normal operation. 7 circuits are used to achieve its superior flexibility. Due to its reliability, this T flip flop is well suited for TR. The system runs on a power supply of 3.3V watts. With an output current of 12mA, this device offers maximum design flexibility. The number of input lines is 2.
SN74LV174ADGVR Features
Tape & Reel (TR) package
74LV series
16 pins
3.3V power supplies
SN74LV174ADGVR Applications
There are a lot of Texas Instruments SN74LV174ADGVR Flip Flops applications.
- Load Control
- Pattern generators
- Bounce elimination switch
- Dynamic threshold performance
- Counters
- Data Synchronizers
- Data transfer
- Bus hold
- CMOS Process
- Data storage