Parameters |
Current - Output High, Low |
12mA 12mA |
Number of Bits per Element |
6 |
Max Propagation Delay @ V, Max CL |
9.2ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
1.7pF |
Number of Input Lines |
2 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
50000000Hz |
Height |
1.2mm |
Length |
5mm |
Width |
4.4mm |
Thickness |
1mm |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 1 day ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
16-TSSOP (0.173, 4.40mm Width) |
Number of Pins |
16 |
Weight |
61.887009mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74LV |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
16 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
2V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.5V |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74LV174 |
Function |
Master Reset |
Qualification Status |
Not Qualified |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
7 |
Load Capacitance |
50pF |
Output Current |
12mA |
Clock Frequency |
180MHz |
Propagation Delay |
20.6 ns |
Turn On Delay Time |
3 ns |
Family |
LV/LV-A/LVX/H |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
20μA |
SN74LV174APW Overview
16-TSSOP (0.173, 4.40mm Width)is the way it is packaged. D flip flop is included in the Tubepackage. There is a Non-Invertedoutput configured with it. This trigger is configured to use Positive Edge. The electronic part is mounted in the way of Surface Mount. A voltage of 2V~5.5Vis required for its operation. In this case, the operating temperature is -40°C~85°C TA. It belongs to the type D-Typeof flip flops. This type of FPGA is a part of the 74LV series. There should be no greater frequency than 180MHzon its output. A total of 1elements are present in it. There is a consumption of 20μAof quiescent energy. A total of 16 terminations have been made. This D latch belongs to the family of 74LV174. It is powered by a voltage of 2.5V . Input capacitance of this device is 1.7pF farads. It belongs to the family of electronic devices known as LV/LV-A/LVX/H. It is mounted by the way of Surface Mount. There are 16pins on it. Its clock edge trigger type is Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. The maximal supply voltage (Vsup) reaches 5.5V. The supply voltage (Vsup) should be kept above 2V for normal operation. To achieve this superior flexibility, 7 circuits are used. It runs on 3.3Vvolts of power. As a result of its output current of 12mA, it is very flexible in terms of design. A total of 2input lines have been provided.
SN74LV174APW Features
Tube package
74LV series
16 pins
3.3V power supplies
SN74LV174APW Applications
There are a lot of Texas Instruments SN74LV174APW Flip Flops applications.
- Divide a clock signal by 2 or 4
- CMOS Process
- Common Clocks
- Frequency Dividers
- ESD protection
- Load Control
- Matched Rise and Fall
- EMI reduction circuitry
- Patented noise
- Digital electronics systems