SN74LV174APWT
| Parameters | |
|---|---|
| Function | Master Reset |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 7 |
| Load Capacitance | 50pF |
| Output Current | 12mA |
| Clock Frequency | 180MHz |
| Propagation Delay | 20.6 ns |
| Turn On Delay Time | 3 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 20μA |
| Current - Output High, Low | 12mA 12mA |
| Number of Bits per Element | 6 |
| Max Propagation Delay @ V, Max CL | 9.2ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 1.7pF |
| Number of Input Lines | 2 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 50000000Hz |
| Length | 5mm |
| Width | 4.4mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Contains Lead |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 16 |
| Weight | 61.887009mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Termination | SMD/SMT |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Base Part Number | 74LV174 |
SN74LV174APWT Overview
It is embeded in 16-TSSOP (0.173, 4.40mm Width) case. The Tape & Reel (TR)package contains it. T flip flop uses Non-Invertedas its output configuration. It is configured with a trigger that uses a value of Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. The supply voltage is set to 2V~5.5V. Currently, the operating temperature is -40°C~85°C TA. A flip flop of this type is classified as a D-Type. The 74LVseries comprises this type of FPGA. A frequency of 180MHzshould not be exceeded by its output. A total of 1elements are present in it. This process consumes 20μA quiescents. Terminations are 16. This D latch belongs to the family of 74LV174. It is powered from a supply voltage of 2.5V. The input capacitance of this T flip flop is 1.7pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. Electronic devices of this type belong to the LV/LV-A/LVX/Hfamily. It is mounted in the way of Surface Mount. The 16pins are designed into the board. In this device, the clock edge trigger type is Positive Edge. This device has the base part number FF/Latches. As soon as 5.5Vis reached, Vsup reaches its maximum value. The supply voltage (Vsup) should be kept above 2V for normal operation. The superior flexibility is achieved through the use of 7 circuits. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TAPE AND REEL. A power supply of 3.3Vis required to operate it. This T flip flop features a maximum design flexibility due to its output current of 12mA. A total of 2input lines have been provided.
SN74LV174APWT Features
Tape & Reel (TR) package
74LV series
16 pins
3.3V power supplies
SN74LV174APWT Applications
There are a lot of Texas Instruments SN74LV174APWT Flip Flops applications.
- Data storage
- Storage Registers
- QML qualified product
- Automotive
- Memory
- Frequency division
- Registers
- Single Down Count-Control Line
- Memory
- High Performance Logic for test systems
