SN74LV273ADWR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 5 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Weight | 500.709277mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Base Part Number | 74LV273 |
| Function | Master Reset |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Output Current | 12mA |
| Number of Bits | 8 |
| Clock Frequency | 160MHz |
| Propagation Delay | 22.1 ns |
| Turn On Delay Time | 4.8 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 20μA |
| Current - Output High, Low | 12mA 12mA |
| Max Propagation Delay @ V, Max CL | 11ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 2pF |
| Number of Input Lines | 2 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 45000000Hz |
| Height | 2.65mm |
| Length | 12.8mm |
| Width | 7.5mm |
| Thickness | 2.35mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV273ADWR Overview
It is packaged in the way of 20-SOIC (0.295, 7.50mm Width). You can find it in the Cut Tape (CT)package. T flip flop uses Non-Invertedas its output configuration. The trigger configured with it uses Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A voltage of 2V~5.5Vis used as the supply voltage. A temperature of -40°C~125°C TAis considered to be the operating temperature. The type of this D latch is D-Type. The 74LVseries comprises this type of FPGA. It should not exceed 160MHzin terms of its output frequency. A total of 1elements are contained within it. There is a consumption of 20μAof quiescent energy. Currently, there are 20 terminations. The object belongs to the 74LV273 family. The D flip flop is powered by a voltage of 2.5V . This JK flip flop has a 2pFfarad input capacitance. Devices in the LV/LV-A/LVX/Hfamily are electronic devices. In this case, the electronic component is mounted in the way of Surface Mount. A total of 20pins are provided on this board. There is a clock edge trigger type of Positive Edgeon this device. The part you are looking for is included in FF/Latches. Flip flops designed with 8bits are used in this part. As soon as 5.5Vis reached, Vsup reaches its maximum value. The supply voltage (Vsup) should be kept above 2V for normal operation. The superior flexibility of this circuit is achieved by using 8 circuits. In view of its reliability, this D flip flop is a good fit for TR. In order for the device to operate, it requires 3.3V power supplies. As a result of its output current of 12mA, it is very flexible in terms of design. There are 2 input Lines, which consist of an electronic circuit connected between the ac mains and the rectifier input stage of the switching power supply.
SN74LV273ADWR Features
Cut Tape (CT) package
74LV series
20 pins
8 Bits
3.3V power supplies
SN74LV273ADWR Applications
There are a lot of Texas Instruments SN74LV273ADWR Flip Flops applications.
- Circuit Design
- Balanced 24 mA output drivers
- Functionally equivalent to the MC10/100EL29
- Latch-up performance
- Safety Clamp
- Set-reset capability
- Buffer registers
- Data storage
- Synchronous counter
- Reduced system switching noise
