SN74LV273APW
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 2 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Weight | 76.997305mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latch |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.65mm |
| Base Part Number | 74LV273 |
| Function | Master Reset |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Output Current | 12mA |
| Number of Bits | 8 |
| Clock Frequency | 160MHz |
| Propagation Delay | 25.5 ns |
| Turn On Delay Time | 4.8 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 20μA |
| Current - Output High, Low | 12mA 12mA |
| Max Propagation Delay @ V, Max CL | 11ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 2pF |
| Number of Input Lines | 2 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 45000000Hz |
| Height | 1.2mm |
| Length | 6.5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV273APW Overview
20-TSSOP (0.173, 4.40mm Width)is the packaging method. Package Tubeembeds it. There is a Non-Invertedoutput configured with it. It is configured with the trigger Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. With a supply voltage of 2V~5.5V volts, it operates. It is at -40°C~125°C TAdegrees Celsius that the system is operating. This electronic flip flop is of type D-Type. JK flip flop belongs to the 74LVseries of FPGAs. A frequency of 160MHzshould not be exceeded by its output. D latch consists of 1 elements. As a result, it consumes 20μA quiescent current and is not affected by external forces. Terminations are 20. The 74LV273 family contains this object. Power is supplied from a voltage of 2.5V volts. JK flip flop input capacitance is 2pF farads. This D flip flop belongs to the family of LV/LV-A/LVX/H. In this case, the electronic component is mounted in the way of Surface Mount. This board is designed with 20pins on it. This device exhibits a clock edge trigger type of Positive Edge. There is a FF/Latchbase part number assigned to the RS flip flops. The design is based on 8bits. Vsup reaches 5.5V, the maximal supply voltage. A normal operating voltage (Vsup) should remain above 2V. 8 circuits are used to achieve its superior flexibility. It runs on 3.3Vvolts of power. This T flip flop features a maximum design flexibility due to its output current of 12mA. As of now, there are 2input lines.
SN74LV273APW Features
Tube package
74LV series
20 pins
8 Bits
3.3V power supplies
SN74LV273APW Applications
There are a lot of Texas Instruments SN74LV273APW Flip Flops applications.
- Balanced Propagation Delays
- ESD protection
- Single Down Count-Control Line
- Supports Live Insertion
- Memory
- Individual Asynchronous Resets
- Synchronous counter
- Common Clocks
- ESCC
- Reduced system switching noise
