SN74LV273APWG4
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 4 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Weight | 76.997305mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LV273 |
| Function | Master Reset |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Load Capacitance | 50pF |
| Output Current | 12mA |
| Number of Bits | 8 |
| Clock Frequency | 160MHz |
| Propagation Delay | 22.1 ns |
| Turn On Delay Time | 4.8 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 20μA |
| Current - Output High, Low | 12mA 12mA |
| Max Propagation Delay @ V, Max CL | 11ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 2pF |
| Power Supply Current-Max (ICC) | 0.02mA |
| Number of Input Lines | 8 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 45000000Hz |
| Height | 1.2mm |
| Length | 6.5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV273APWG4 Overview
The flip flop is packaged in a case of 20-TSSOP (0.173, 4.40mm Width). It is contained within the Tubepackage. T flip flop uses Non-Invertedas the output. The trigger it is configured with uses Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. With a supply voltage of 2V~5.5V volts, it operates. Currently, the operating temperature is -40°C~125°C TA. It is an electronic flip flop with the type D-Type. JK flip flop is a part of the 74LVseries of FPGAs. This D flip flop should not have a frequency greater than 160MHz. A total of 1elements are contained within it. As a result, it consumes 20μA of quiescent current without being affected by external factors. There have been 20 terminations. It is a member of the 74LV273 family. The D flip flop is powered by a voltage of 2.5V . Input capacitance of this device is 2pF farads. It is a member of the LV/LV-A/LVX/Hfamily of D flip flop. It is mounted by the way of Surface Mount. The electronic flip flop is designed with pins 20. The clock edge trigger type for this device is Positive Edge. This RS flip flops is a part number FF/Latches. An electronic part designed with 8bits is used in this application. It reaches the maximum supply voltage (Vsup) at 5.5V. The supply voltage (Vsup) should be maintained above 2V for normal operation. It runs on 3.3Vvolts of power. Its output current of 12mAallows for maximum design flexibility. 8input lines are available for you to choose from.
SN74LV273APWG4 Features
Tube package
74LV series
20 pins
8 Bits
3.3V power supplies
SN74LV273APWG4 Applications
There are a lot of Texas Instruments SN74LV273APWG4 Flip Flops applications.
- Consumer
- Guaranteed simultaneous switching noise level
- Parallel data storage
- Single Down Count-Control Line
- Bus hold
- Storage Registers
- Reduced system switching noise
- Convert a momentary switch to a toggle switch
- ATE
- Dynamic threshold performance
