SN74LV273APWRG4
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 5 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Weight | 76.997305mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.65mm |
| Base Part Number | 74LV273 |
| Function | Master Reset |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Output Current | 12mA |
| Number of Bits | 8 |
| Clock Frequency | 160MHz |
| Propagation Delay | 22.1 ns |
| Quiescent Current | 20μA |
| Turn On Delay Time | 4.8 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Flip-Flop |
| Current - Output High, Low | 12mA 12mA |
| Max Propagation Delay @ V, Max CL | 11ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 2pF |
| Number of Input Lines | 2 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 45000000Hz |
| Height | 1.2mm |
| Length | 6.5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV273APWRG4 Overview
It is embeded in 20-TSSOP (0.173, 4.40mm Width) case. There is an embedded version in the package Tape & Reel (TR). As configured, the output uses Non-Inverted. In the configuration of the trigger, Positive Edgeis used. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates with an input voltage of 2V~5.5V volts. Temperature is set to -40°C~125°C TA. This electronic flip flop is of type D-Type. In terms of FPGAs, it belongs to the 74LV series. It should not exceed 160MHzin its output frequency. A total of 1elements are present in it. Currently, there are 20 terminations. Members of the 74LV273family make up this object. The power source is powered by 2.5V. The input capacitance of this JK flip flopis 2pF farads. A device of this type belongs to the family of LV/LV-A/LVX/H. This electronic part is mounted in the way of Surface Mount. There are 20pins on it. This device has Positive Edgeas its clock edge trigger type. The part is included in FF/Latches. There are 8bits in its design. 5.5Vis the maximum supply voltage (Vsup). For normal operation, the supply voltage (Vsup) should be kept above 2V. Its superior flexibility is attributed to its use of 8 circuits. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TR. It operates from 3.3V power supplies. This T flip flop features a maximum design flexibility due to its output current of 12mA. It is reported that there are 2 input lines. Quiescent current is consumed by the D latch in the amount of 20μA.
SN74LV273APWRG4 Features
Tape & Reel (TR) package
74LV series
20 pins
8 Bits
3.3V power supplies
SN74LV273APWRG4 Applications
There are a lot of Texas Instruments SN74LV273APWRG4 Flip Flops applications.
- ESD protection
- Circuit Design
- Memory
- Data Synchronizers
- Clock pulse
- Latch-up performance
- Power down protection
- Balanced Propagation Delays
- ESD performance
- QML qualified product
