SN74LV374APW
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 2 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Weight | 76.997305mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Termination | SMD/SMT |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.65mm |
| Base Part Number | 74LV374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 16mA |
| Number of Bits | 8 |
| Clock Frequency | 170MHz |
| Propagation Delay | 23 ns |
| Turn On Delay Time | 4.9 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 20μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 16mA 16mA |
| Max Propagation Delay @ V, Max CL | 10.1ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 2.9pF |
| Number of Input Lines | 2 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Max Frequency@Nom-Sup | 50000000Hz |
| Height | 1.2mm |
| Length | 6.5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV374APW Overview
20-TSSOP (0.173, 4.40mm Width)is the way it is packaged. There is an embedded version in the package Tube. T flip flop is configured with an output of Tri-State, Non-Inverted. It is configured with a trigger that uses a value of Positive Edge. Surface Mountmounts this electrical part. A voltage of 2V~5.5Vis required for its operation. Currently, the operating temperature is -40°C~85°C TA. Logic flip flops of this type are classified as D-Type. JK flip flop is a part of the 74LVseries of FPGAs. You should not exceed 170MHzin the output frequency of the device. In total, there are 1 elements. There is 20μA quiescent consumption. A total of 20terminations have been recorded. If you search by 74LV374, you will find similar parts. A voltage of 2.5V is used to power it. The input capacitance of this T flip flop is 2.9pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. Electronic devices of this type belong to the LV/LV-A/LVX/Hfamily. There is an electronic part that is mounted in the way of Surface Mount. A total of 20pins are provided on this board. The clock edge trigger type for this device is Positive Edge. It is included in FF/Latches. This flip flop is designed with 8 Bits. It reaches the maximum supply voltage (Vsup) at 5.5V. Normally, the supply voltage (Vsup) should be kept above 2V. The superior flexibility is achieved through the use of 8 circuits. The power supply is 3.3V. The flip flop contains 2ports. With an output current of 16mA, it is possible to design the device in any way you want. A total of 2input lines have been provided.
SN74LV374APW Features
Tube package
74LV series
20 pins
8 Bits
3.3V power supplies
SN74LV374APW Applications
There are a lot of Texas Instruments SN74LV374APW Flip Flops applications.
- Count Modes
- Memory
- Functionally equivalent to the MC10/100EL29
- Single Down Count-Control Line
- Frequency division
- Test & Measurement
- Parallel data storage
- Consumer
- Shift Registers
- Modulo – n – counter
