SN74LV374APWT
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Weight | 76.997305mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Termination | SMD/SMT |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LV374 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 16mA |
| Number of Bits | 8 |
| Clock Frequency | 170MHz |
| Propagation Delay | 19.3 ns |
| Turn On Delay Time | 4.9 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 20μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 16mA 16mA |
| Max Propagation Delay @ V, Max CL | 10.1ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 2.9pF |
| Number of Input Lines | 2 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 50000000Hz |
| Length | 6.5mm |
| Width | 4.4mm |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV374APWT Overview
It is embeded in 20-TSSOP (0.173, 4.40mm Width) case. It is contained within the Tape & Reel (TR)package. This output is configured with Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. In this case, the electronic component is mounted in the way of Surface Mount. The supply voltage is set to 2V~5.5V. -40°C~85°C TAis the operating temperature. This logic flip flop is classified as type D-Type. JK flip flop belongs to the 74LVseries of FPGAs. In order for it to function properly, its output frequency should not exceed 170MHz. In total, there are 1 elements. It consumes 20μA of quiescent Currently, there are 20 terminations. The 74LV374 family contains it. It is powered from a supply voltage of 2.5V. This JK flip flop has a 2.9pFfarad input capacitance. Devices in the LV/LV-A/LVX/Hfamily are electronic devices. The electronic part is mounted in the way of Surface Mount. This board has 20 pins. This device's clock edge trigger type is Positive Edge. The part you are looking for is included in FF/Latches. This flip flop is designed with 8 Bits. The maximal supply voltage (Vsup) reaches 5.5V. Normally, the supply voltage (Vsup) should be kept above 2V. Its flexibility is enhanced by 8 circuits. Due to its reliability, this T flip flop is well suited for TR. A total of 3.3V power supplies are needed to run it. There are 2 ports embedded in the flip flops. It offers maximum design flexibility with its output current of 16mA. There are 2 input Lines, which consist of an electronic circuit connected between the ac mains and the rectifier input stage of the switching power supply.
SN74LV374APWT Features
Tape & Reel (TR) package
74LV series
20 pins
8 Bits
3.3V power supplies
SN74LV374APWT Applications
There are a lot of Texas Instruments SN74LV374APWT Flip Flops applications.
- Memory
- Differential Individual
- Single Up Count-Control Line
- Frequency division
- Parallel data storage
- Data transfer
- ESD protection
- Computing
- High Performance Logic for test systems
- Count Modes
