SN74LV374ARGYR
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-VFQFN Exposed Pad |
| Number of Pins | 20 |
| Weight | 43.006227mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LV |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 2 (1 Year) |
| Number of Terminations | 20 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | QUAD |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.5mm |
| Base Part Number | 74LV374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 16mA |
| Number of Bits | 8 |
| Clock Frequency | 170MHz |
| Propagation Delay | 19.3 ns |
| Turn On Delay Time | 4.9 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 20μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 16mA 16mA |
| Max Propagation Delay @ V, Max CL | 10.1ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 2.9pF |
| Number of Input Lines | 2 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 50000000Hz |
| Length | 4.5mm |
| Width | 3.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV374ARGYR Overview
The flip flop is packaged in 20-VFQFN Exposed Pad. There is an embedded version in the package Cut Tape (CT). As configured, the output uses Tri-State, Non-Inverted. It is configured with the trigger Positive Edge. This electronic part is mounted in the way of Surface Mount. A supply voltage of 2V~5.5V is required for operation. -40°C~85°C TAis the operating temperature. Logic flip flops of this type are classified as D-Type. In terms of FPGAs, it belongs to the 74LV series. You should not exceed 170MHzin its output frequency. The element count is 1 . There is a consumption of 20μAof quiescent energy. It has been determined that there have been 20 terminations. JK flip flop belongs to 74LV374 family. The power supply voltage is 2.5V. Its input capacitance is 2.9pFfarads. LV/LV-A/LVX/His the family of this D flip flop. This electronic part is mounted in the way of Surface Mount. 20pins are included in its design. This device has Positive Edgeas its clock edge trigger type. There is a FF/Latchesbase part number assigned to the RS flip flops. This flip flop is designed with 8 Bits. There is a 5.5Vmaximum supply voltage (Vsup). For normal operation, the supply voltage (Vsup) should be above 2V. 8 circuits are used to achieve its superior flexibility. Due to its reliability, this T flip flop is well suited for TAPE AND REEL. In order for the device to operate, it requires 3.3V power supplies. The flip flop has 2embedded ports. The output current of 16mA makes it feature maximum design flexibility. It has 2lines.
SN74LV374ARGYR Features
Cut Tape (CT) package
74LV series
20 pins
8 Bits
3.3V power supplies
SN74LV374ARGYR Applications
There are a lot of Texas Instruments SN74LV374ARGYR Flip Flops applications.
- ATE
- Instrumentation
- QML qualified product
- Frequency Divider circuits
- Reduced system switching noise
- Power down protection
- EMI reduction circuitry
- Latch
- Data storage
- Buffer registers
