SN74LV573APWR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Weight | 76.997305mg |
| Operating Temperature | -40°C~85°C |
| Packaging | Tape & Reel (TR) |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.65mm |
| Base Part Number | 74LV573 |
| Pin Count | 20 |
| Output Type | Tri-State |
| Circuit | 8:8 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 16mA |
| Number of Bits | 8 |
| Propagation Delay | 23 ns |
| Turn On Delay Time | 1 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Latch |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 16mA 16mA |
| Logic Type | D-Type Transparent Latch |
| Control Type | ENABLE LOW |
| Number of Input Lines | 2 |
| Independent Circuits | 1 |
| Count Direction | UNIDIRECTIONAL |
| Height | 1.2mm |
| Length | 6.5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV573APWR Overview
In the 20-TSSOP (0.173, 4.40mm Width) package, it is embedded. Tape & Reel (TR) is the way it is packaged. In this configuration, the output is set to Tri-State. There is a logic type of D-Type Transparent Latch for this electrical device. Mounting this electronic component follows the Surface Mount method. A 2V~5.5V supply voltage is required to operate it. During operation, the temperature is set at -40°C~85°C. An FPGA in this series belongs to the 74LV family. It is designed with 8 bits. A device with this design has 20 terminations. 74LV573 is its family. The device works with a voltage of 2.5V for its supply voltage. The device is equipped with 20 pins. It is a member of the LV/LV-A/LVX/H family of electronic devices. This board has 20 pins on it, which is what it is designed for. This electronic part is mounted in the way of Surface Mount. This device has 2 ports that can be connected to it. Subcategory FF/Latches contains this part. 5.5V is the maximum supply voltage (Vsup). 3.3V power supplies are needed to operate it. A voltage greater than 2V must be supplied as a power supply (Vsup). An electronic circuit can be found on 2 input lines. Its reliable performance makes it an excellent choice for TR. The output current of 16mA makes it feature maximum design flexibility.
SN74LV573APWR Features
20-TSSOP (0.173, 4.40mm Width) package
74LV series
8 Bits
74LV573 family
20 pin count
20 pins
3.3V power supplies
SN74LV573APWR Applications
There are a lot of Texas Instruments SN74LV573APWR Latches applications.
- Motor Drives
- Phase comparator
- Counters
- Watches
- Pattern Generators
- Serial Output Data Queuing
- PCs and Notebooks
- Synchronous frequency dividers
- Meter applications
- Hammer
