SN74LV573ARGYRG4
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 4 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-VFQFN Exposed Pad |
| Number of Pins | 20 |
| Weight | 43.006227mg |
| Operating Temperature | -40°C~85°C |
| Packaging | Tape & Reel (TR) |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 2 (1 Year) |
| Number of Terminations | 20 |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | QUAD |
| Terminal Form | NO LEAD |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LV573 |
| Pin Count | 20 |
| Qualification Status | Not Qualified |
| Output Type | Tri-State |
| Circuit | 8:8 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 16mA |
| Number of Bits | 8 |
| Propagation Delay | 8.8 ns |
| Quiescent Current | 20μA |
| Turn On Delay Time | 1 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Latch |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 16mA 16mA |
| Logic Type | D-Type Transparent Latch |
| Control Type | ENABLE LOW |
| Power Supply Current-Max (ICC) | 0.02mA |
| Independent Circuits | 1 |
| Count Direction | UNIDIRECTIONAL |
| Height | 1mm |
| Length | 4.5mm |
| Width | 3.5mm |
| Thickness | 900μm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV573ARGYRG4 Overview
It is embedded in the 20-VFQFN Exposed Pad package. A package of Tape & Reel (TR) has been used. There is a Tri-State output configured. D-Type Transparent Latch is the logic type of this electrical device. Mounting this electronic component follows the Surface Mount method. With a supply voltage of 2V~5.5V, it operates. A temperature of -40°C~85°C is set as the operating temperature. An FPGA of this type belongs to the 74LV series. The electronic part in this image has 8 bits. A device with this design has 20 terminations. The family 74LV573 includes it. The device works with a voltage of 2.5V for its supply voltage. It is equipped with 20 pin count. There is a device in this electronic family called LV/LV-A/LVX/H. This board has 20 pins on it, which is what it is designed for. The electronic part is mounted using the Surface Mount method. This device has a total of 2 ports. The part is in the FF/Latches subcategory. 5.5V is the maximum supply voltage (Vsup). There is 3.3V power supply for it. The supply voltage (Vsup) should be greater than 2V. Considering the reliability of this device, it would be a good candidate for TR. Its 16mA output current allows for maximum design flexibility. There are no external factors that affect it, so it consumes 20μA quiescent current. It achieves superior flexibility by using 8 circuits. A maximal power current (ICC) is generated for its operation at 0.02mA.
SN74LV573ARGYRG4 Features
20-VFQFN Exposed Pad package
74LV series
8 Bits
74LV573 family
20 pin count
20 pins
3.3V power supplies
SN74LV573ARGYRG4 Applications
There are a lot of Texas Instruments SN74LV573ARGYRG4 Latches applications.
- Bus system register with enable parallel lines at bus side
- Shift left register
- Phase comparator
- Communication systems
- Timers
- Display driver
- Automotive Cluster
- Digital bus buffer
- Serial Input
- Display
