SN74LV74APWRG4
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 day ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 14 |
| Weight | 57.209338mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Base Part Number | 74LV74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 12mA |
| Clock Frequency | 140MHz |
| Propagation Delay | 20 ns |
| Quiescent Current | 20μA |
| Turn On Delay Time | 9.8 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Output High, Low | 12mA 12mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 9.3ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 2pF |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 45000000Hz |
| Height | 1.2mm |
| Length | 5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV74APWRG4 Overview
The flip flop is packaged in a case of 14-TSSOP (0.173, 4.40mm Width). D flip flop is embedded in the Tape & Reel (TR) package. This output is configured with Differential. It is configured with a trigger that uses a value of Positive Edge. This electronic part is mounted in the way of Surface Mount. Powered by a 2V~5.5Vvolt supply, it operates as follows. In this case, the operating temperature is -40°C~125°C TA. It is an electronic flip flop with the type D-Type. In FPGA terms, D flip flop is a type of 74LVseries FPGA. You should not exceed 140MHzin its output frequency. The number of terminations is 14. Members of the 74LV74family make up this object. The D flip flop is powered by a voltage of 2.5V . A JK flip flop with a 2pFfarad input capacitance is used here. Devices in the LV/LV-A/LVX/Hfamily are electronic devices. Electronic part Surface Mountis mounted in the way. 14pins are included in its design. This device's clock edge trigger type is Positive Edge. The part is included in FF/Latches. In this case, the maximum supply voltage (Vsup) reaches 5.5V. Normally, the supply voltage (Vsup) should be kept above 2V. Despite its superior flexibility, it relies on 2 circuits to achieve it. Considering its reliability, this T flip flop is well suited for TR. A power supply of 3.3Vis required to operate it. Its output current of 12mAallows for maximum design flexibility. 20μAquiescent current consumed.
SN74LV74APWRG4 Features
Tape & Reel (TR) package
74LV series
14 pins
3.3V power supplies
SN74LV74APWRG4 Applications
There are a lot of Texas Instruments SN74LV74APWRG4 Flip Flops applications.
- Individual Asynchronous Resets
- Cold spare funcion
- Test & Measurement
- Modulo – n – counter
- Data storage
- Functionally equivalent to the MC10/100EL29
- Safety Clamp
- Frequency Dividers
- Balanced Propagation Delays
- Frequency division
