SN74LV74ARGYR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 4 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-VFQFN Exposed Pad |
| Number of Pins | 14 |
| Weight | 32.205058mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 2 (1 Year) |
| Number of Terminations | 14 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | QUAD |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.5mm |
| Base Part Number | 74LV74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 12mA |
| Clock Frequency | 140MHz |
| Propagation Delay | 20 ns |
| Quiescent Current | 20μA |
| Turn On Delay Time | 9.8 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Output High, Low | 12mA 12mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 9.3ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 2pF |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 45000000Hz |
| Height | 1mm |
| Length | 3.5mm |
| Width | 3.5mm |
| Thickness | 900μm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV74ARGYR Overview
The flip flop is packaged in a case of 14-VFQFN Exposed Pad. You can find it in the Cut Tape (CT)package. T flip flop uses Differentialas its output configuration. In the configuration of the trigger, Positive Edgeis used. This electronic part is mounted in the way of Surface Mount. It operates with a supply voltage of 2V~5.5V. The operating temperature is -40°C~125°C TA. The type of this D latch is D-Type. In terms of FPGAs, it belongs to the 74LV series. A frequency of 140MHzshould be the maximum output frequency. There have been 14 terminations. You can search similar parts based on 74LV74. Power is provided by a 2.5V supply. A JK flip flop with a 2pFfarad input capacitance is used here. It is a member of the LV/LV-A/LVX/Hfamily of D flip flop. There is an electronic part mounted in the way of Surface Mount. This board is designed with 14pins on it. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. This device is part of the FF/Latchesbase part number family. Vsup reaches its maximum value at 5.5V. Normally, the supply voltage (Vsup) should be above 2V. To achieve this superior flexibility, 2 circuits are used. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TR. It runs on 3.3Vvolts of power. With an output current of 12mA, it is possible to design the device in any way you want. Quiescent current is consumed by the D latch in the amount of 20μA.
SN74LV74ARGYR Features
Cut Tape (CT) package
74LV series
14 pins
3.3V power supplies
SN74LV74ARGYR Applications
There are a lot of Texas Instruments SN74LV74ARGYR Flip Flops applications.
- Clock pulse
- Control circuits
- Registers
- Supports Live Insertion
- Differential Individual
- EMI reduction circuitry
- ATE
- Single Up Count-Control Line
- Event Detectors
- Convert a momentary switch to a toggle switch
