SN74LVC112APWRE4
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | TSSOP |
| Number of Pins | 16 |
| Weight | 61.887009mg |
| Packaging | Tape & Reel (TR) |
| JESD-609 Code | e4 |
| Moisture Sensitivity Level (MSL) | 1 |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Subcategory | FF/Latch |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 2 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.65mm |
| Frequency | 150MHz |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Pin Count | 16 |
| Qualification Status | Not Qualified |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Temperature Grade | AUTOMOTIVE |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 1.65V |
| Load Capacitance | 50pF |
| Current - Output | 24mA |
| Propagation Delay | 7.1 ns |
| Turn On Delay Time | 1 ns |
| Family | LVC/LCX/Z |
| Logic Function | AND, Flip-Flop, JK-Type |
| Logic IC Type | J-K FLIP-FLOP |
| Number of Bits per Element | 1 |
| Prop. Delay@Nom-Sup | 5.9 ns |
| High Level Output Current | -24mA |
| Low Level Output Current | 24mA |
| Number of Input Lines | 3 |
| Clock Edge Trigger Type | Negative Edge |
| Length | 5mm |
| Width | 4.4mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
SN74LVC112APWRE4 Overview
The flip flop is packaged in a case of TSSOP. D flip flop is included in the Tape & Reel (TR)package. D latch consists of 2 elements. A total of 16 terminations have been made. It is powered from a supply voltage of 1.8V. In terms of electronic devices, this device belongs to the LVC/LCX/Zfamily of devices. There is an electronic part that is mounted in the way of Surface Mount. As you can see from the design, it has pins with 16. A Negative Edgeclock edge trigger is used in this device. The part is included in FF/Latch. On the basis of its reliable performance, this D flip flop is well suited for use with TAPE AND REEL. This input has 3lines. The high level output current is set to -24mA. It is set to 24mAfor low level output current. A temperature below 85°Cis recommended for operation. Temperatures above -40°Cshould be used. The RS flip flop is designed to operate with a minimal supply voltage of 1.65VV. A maximum voltage of 3.6V can be provided by it. This frequency can be achieved 150MHz. There is a logic IC J-K FLIP-FLOP used in the D flip flop. As a result, it is equipped with 2 functions . There are 16 pins on the D latch. As a result of the output current of 24mA, the design flexibility is maximized.
SN74LVC112APWRE4 Features
Tape & Reel (TR) package
16 pins
2 Functions
16 pin count
SN74LVC112APWRE4 Applications
There are a lot of Texas Instruments SN74LVC112APWRE4 Flip Flops applications.
- Power down protection
- Data transfer
- 2 – Bit synchronous counter
- Supports Live Insertion
- CMOS Process
- Guaranteed simultaneous switching noise level
- Balanced 24 mA output drivers
- Load Control
- ESD performance
- Counters
