SN74LVC112APWRG4
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | TSSOP |
| Number of Pins | 16 |
| Weight | 61.887009mg |
| JESD-609 Code | e4 |
| Moisture Sensitivity Level (MSL) | 1 |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 2 |
| Supply Voltage | 1.8V |
| Frequency | 150MHz |
| Pin Count | 16 |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Power Supplies | 3.3V |
| Temperature Grade | AUTOMOTIVE |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 1.65V |
| Load Capacitance | 50pF |
| Current - Output | 24mA |
| Number of Bits | 2 |
| Propagation Delay | 7.1 ns |
| Turn On Delay Time | 1 ns |
| Family | LVC/LCX/Z |
| Logic Function | AND, JK-Type |
| Logic IC Type | J-K FLIP-FLOP |
| Prop. Delay@Nom-Sup | 5.9 ns |
| High Level Output Current | -24mA |
| Low Level Output Current | 24mA |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Negative Edge |
| Height | 1.15mm |
| Length | 5mm |
| Width | 4.4mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
SN74LVC112APWRG4 Overview
The package is in the form of TSSOP. A total of 2elements are present in it. There are 16 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. A voltage of 1.8V provides power to the D latch. Electronic devices of this type belong to the LVC/LCX/Zfamily. Surface Mount mounts this electronic component. There are 16pins on it. This device exhibits a clock edge trigger type of Negative Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. An electronic part with 2bits has been designed. Considering the reliability of this T flip flop, it is well suited for TAPE AND REEL. It runs on 3.3Vvolts of power. The JK flip flop is with 1 output lines to operate. It is set to -24mAfor the high level output current. The low level output current is set to 24mA. There should be a temperature below 85°Cduring operation. It is recommended that the operating temperature be greater than -40°C. Despite its minimal supply voltage of 1.65V, it is capable of operating. A maximum voltage of 3.6V can be provided by it. The frequency can be set to 150MHz. There is a logic IC J-K FLIP-FLOP used in the D flip flop. There are 2 functions available on the JK flip flop. A total of 16 pins are present on this device. It features maximum design flexibility due to the 24mA output current.
SN74LVC112APWRG4 Features
16 pins
2 Bits
3.3V power supplies
2 Functions
16 pin count
SN74LVC112APWRG4 Applications
There are a lot of Texas Instruments SN74LVC112APWRG4 Flip Flops applications.
- Functionally equivalent to the MC10/100EL29
- Guaranteed simultaneous switching noise level
- Communications
- ESCC
- Control circuits
- Memory
- Shift Registers
- ESD performance
- Consumer
- ESD protection
