SN74LVC1G175DCKR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 2 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 6-TSSOP, SC-88, SOT-363 |
| Number of Pins | 6 |
| Weight | 2.494758mg |
| Manufacturer Package Identifier | DCk(R-PDSO-G6) |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Base Part Number | 74LVC1G175 |
| Function | Reset |
| Output Type | Non-Inverted |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Number of Circuits | 1 |
| Load Capacitance | 50pF |
| Output Current | 32mA |
| Number of Bits | 1 |
| Clock Frequency | 175MHz |
| Propagation Delay | 13.4 ns |
| Turn On Delay Time | 1 ns |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 32mA |
| Max I(ol) | 0.032 A |
| Max Propagation Delay @ V, Max CL | 5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.1mm |
| Length | 2mm |
| Width | 1.25mm |
| Thickness | 900μm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LVC1G175DCKR Overview
It is embeded in 6-TSSOP, SC-88, SOT-363 case. Package Cut Tape (CT)embeds it. T flip flop is configured with an output of Non-Inverted. Positive Edgeis the trigger it is configured with. There is an electric part mounted in the way of Surface Mount. A 1.65V~5.5Vsupply voltage is required for it to operate. -40°C~125°C TAis the operating temperature. The type of this D latch is D-Type. It is a type of FPGA belonging to the 74LVC series. A frequency of 175MHzshould not be exceeded by its output. As a result, it consumes 10μA quiescent current and is not affected by external forces. Terminations are 6. The object belongs to the 74LVC1G175 family. It is powered by a voltage of 1.8V . JK flip flop input capacitance is 3pF farads. In this case, the D flip flop belongs to the LVC/LCX/Zfamily. Electronic part Surface Mountis mounted in the way. The electronic flip flop is designed with pins 6. Its clock edge trigger type is Positive Edge. It is part of the FF/Latchesbase part number family. Flip flops designed with 1bits are used in this part. It reaches 5.5Vwhen the supply voltage is maximal (Vsup). 1 circuits are used to achieve its superior flexibility. In light of its reliable performance, this T flip flop is well suited for TR. The power supply is 3.3V. It offers maximum design flexibility with its output current of 32mA.
SN74LVC1G175DCKR Features
Cut Tape (CT) package
74LVC series
6 pins
1 Bits
3.3V power supplies
SN74LVC1G175DCKR Applications
There are a lot of Texas Instruments SN74LVC1G175DCKR Flip Flops applications.
- Frequency Divider circuits
- Latch
- ESD performance
- Count Modes
- Power down protection
- Cold spare funcion
- Event Detectors
- Divide a clock signal by 2 or 4
- Bounce elimination switch
- Patented noise
