Parameters |
Thickness |
550μm |
Radiation Hardening |
No |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 5 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
8-UFQFN |
Number of Pins |
8 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74LVC |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
8 |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
CMOS |
Voltage - Supply |
1.65V~5.5V |
Terminal Position |
QUAD |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
1.8V |
Terminal Pitch |
0.5mm |
Base Part Number |
74LVC1G74 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
3.3V |
Number of Circuits |
1 |
Output Current |
32mA |
Number of Bits |
1 |
Clock Frequency |
200MHz |
Propagation Delay |
4.4 ns |
Turn On Delay Time |
1.6 ns |
Family |
LVC/LCX/Z |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
10μA |
Current - Output High, Low |
32mA 32mA |
Number of Gates |
2 |
Max Propagation Delay @ V, Max CL |
4.4ns @ 5V, 50pF |
Prop. Delay@Nom-Sup |
5.9 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
5pF |
Clock Edge Trigger Type |
Positive Edge |
Height |
600μm |
Length |
1.5mm |
Width |
1.5mm |
SN74LVC1G74RSER Overview
The flip flop is packaged in a case of 8-UFQFN. The Tape & Reel (TR)package contains it. There is a Differentialoutput configured with it. Positive Edgeis the trigger it is configured with. The electronic part is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1.65V~5.5V. Currently, the operating temperature is -40°C~85°C TA. There is D-Type type of electronic flip flop associated with this device. It is a type of FPGA belonging to the 74LVC series. It should not exceed 200MHzin its output frequency. It consumes 10μA of quiescent There are 8 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. You can search similar parts based on 74LVC1G74. It is powered from a supply voltage of 1.8V. There is 5pF input capacitance for this T flip flop. Electronic devices of this type belong to the LVC/LCX/Zfamily. It is mounted by the way of Surface Mount. 8pins are included in its design. This device's clock edge trigger type is Positive Edge. This part is included in FF/Latches. There are 1bits in its design. It reaches 5.5Vwhen the maximum supply voltage (Vsup) is applied. The superior flexibility of this circuit is achieved by using 1 circuits. As a result of its reliability, this D flip flop is ideally suited for TR. It runs on 3.3Vvolts of power. In addition to its maximum design flexibility, the output current of the T flip flop is 32mA. There are 2 gates in its basic building block.
SN74LVC1G74RSER Features
Tape & Reel (TR) package
74LVC series
8 pins
1 Bits
3.3V power supplies
2 gates
SN74LVC1G74RSER Applications
There are a lot of Texas Instruments SN74LVC1G74RSER Flip Flops applications.
- Individual Asynchronous Resets
- Asynchronous counter
- Consumer
- Guaranteed simultaneous switching noise level
- Balanced Propagation Delays
- Convert a momentary switch to a toggle switch
- EMI reduction circuitry
- Clock pulse
- Instrumentation
- Set-reset capability