SN74LVC1G79YEPR
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 5-XFBGA, DSBGA |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 5 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC1G79 |
| JESD-30 Code | R-PBGA-B5 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Load Capacitance | 50pF |
| Number of Bits | 1 |
| Clock Frequency | 160MHz |
| Turn On Delay Time | 1 ns |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 32mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 5V, 50pF |
| Prop. Delay@Nom-Sup | 5 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Propagation Delay (tpd) | 9.9 ns |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 0.5mm |
| Width | 0.9mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Contains Lead |
SN74LVC1G79YEPR Overview
It is embeded in 5-XFBGA, DSBGA case. The package Tape & Reel (TR)contains it. Currently, the output is configured to use Non-Inverted. The trigger it is configured with uses Positive Edge. It is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1.65V~5.5V. In the operating environment, the temperature is -40°C~85°C TA. It belongs to the type D-Typeof flip flops. JK flip flop is a part of the 74LVCseries of FPGAs. In order for it to function properly, its output frequency should not exceed 160MHz. D latch consists of 1 elements. There is 10μA quiescent consumption. There are 5 terminations,If you search by 74LVC1G79, you will find similar parts. Power is supplied from a voltage of 1.8V volts. Input capacitance of this device is 4pF farads. Electronic devices of this type belong to the LVC/LCX/Zfamily. Electronic part Surface Mountis mounted in the way. A Positive Edgeclock edge trigger is used in this device. This part is included in FF/Latches. An electronic part with 1bits has been designed. It reaches 5.5Vwhen the supply voltage is maximal (Vsup). In light of its reliable performance, this T flip flop is well suited for TAPE AND REEL. A power supply of 3.3Vis required to operate it.
SN74LVC1G79YEPR Features
Tape & Reel (TR) package
74LVC series
1 Bits
3.3V power supplies
SN74LVC1G79YEPR Applications
There are a lot of Texas Instruments SN74LVC1G79YEPR Flip Flops applications.
- Balanced 24 mA output drivers
- ESD protection
- Frequency Dividers
- Shift Registers
- Synchronous counter
- Individual Asynchronous Resets
- Storage registers
- Reduced system switching noise
- Power down protection
- Single Up Count-Control Line
