Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
5-XFBGA, DSBGA |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Cut Tape (CT) |
Series |
74LVC |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
5 |
Type |
D-Type |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
CMOS |
Voltage - Supply |
1.65V~5.5V |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
1.8V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74LVC1G79 |
JESD-30 Code |
R-PBGA-B5 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
3.3V |
Load Capacitance |
50pF |
Number of Bits |
1 |
Clock Frequency |
160MHz |
Turn On Delay Time |
1 ns |
Family |
LVC/LCX/Z |
Current - Quiescent (Iq) |
10μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
32mA 32mA |
Max I(ol) |
0.024 A |
Max Propagation Delay @ V, Max CL |
4.5ns @ 5V, 50pF |
Prop. Delay@Nom-Sup |
5 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Propagation Delay (tpd) |
9.9 ns |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
0.5mm |
Width |
0.9mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74LVC1G79YZAR Overview
5-XFBGA, DSBGAis the packaging method. D flip flop is embedded in the Cut Tape (CT) package. T flip flop uses Non-Invertedas the output. It is configured with a trigger that uses a value of Positive Edge. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1.65V~5.5V. It is operating at -40°C~85°C TA. A flip flop of this type is classified as a D-Type. In terms of FPGAs, it belongs to the 74LVC series. You should not exceed 160MHzin the output frequency of the device. A total of 1elements are contained within it. T flip flop consumes 10μA quiescent energy. Terminations are 5. Members of the 74LVC1G79family make up this object. It is powered by a voltage of 1.8V . The input capacitance of this T flip flop is 4pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. In terms of electronic devices, this device belongs to the LVC/LCX/Zfamily of devices. The electronic part is mounted in the way of Surface Mount. There is a clock edge trigger type of Positive Edgeon this device. The part is included in FF/Latches. An electronic part designed with 1bits is used in this application. The maximal supply voltage (Vsup) reaches 5.5V. As a result of its reliability, this D flip flop is ideally suited for TAPE AND REEL. A total of 3.3V power supplies are needed to run it.
SN74LVC1G79YZAR Features
Cut Tape (CT) package
74LVC series
1 Bits
3.3V power supplies
SN74LVC1G79YZAR Applications
There are a lot of Texas Instruments SN74LVC1G79YZAR Flip Flops applications.
- Cold spare funcion
- Pattern generators
- Automotive
- ESCC
- Common Clocks
- Data Synchronizers
- Digital electronics systems
- Consumer
- Latch
- Buffered Clock