Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 1 week ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
5-TSSOP, SC-70-5, SOT-353 |
Number of Pins |
5 |
Weight |
2.494758mg |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74LVC |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
5 |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
CMOS |
Voltage - Supply |
1.65V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
1.8V |
Base Part Number |
74LVC1G80 |
Function |
Standard |
Output Type |
Inverted |
Polarity |
Inverting |
Power Supplies |
3.3V |
Number of Circuits |
1 |
Number of Bits |
1 |
Clock Frequency |
160MHz |
Propagation Delay |
5.2 ns |
Turn On Delay Time |
1.1 ns |
Family |
LVC/LCX/Z |
Current - Quiescent (Iq) |
10μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
32mA 32mA |
Max I(ol) |
0.032 A |
Max Propagation Delay @ V, Max CL |
4.5ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3.5pF |
Clock Edge Trigger Type |
Positive Edge |
Height |
1.1mm |
Length |
2mm |
Width |
1.25mm |
Thickness |
900μm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74LVC1G80DCKRG4 Overview
The package is in the form of 5-TSSOP, SC-70-5, SOT-353. There is an embedded version in the package Tape & Reel (TR). The output it is configured with uses Inverted. This trigger is configured to use Positive Edge. Surface Mountis occupied by this electronic component. The JK flip flop operates with an input voltage of 1.65V~5.5V volts. In this case, the operating temperature is -40°C~125°C TA. Logic flip flops of this type are classified as D-Type. The 74LVCseries comprises this type of FPGA. A frequency of 160MHzshould not be exceeded by its output. It consumes 10μA of quiescent current without being affected by external factors. Terminations are 5. JK flip flop belongs to 74LVC1G80 family. A voltage of 1.8V is used to power it. This T flip flop has a capacitance of 3.5pF farads at the input. LVC/LCX/Zis the family of this D flip flop. The electronic part is mounted in the way of Surface Mount. The electronic flip flop is designed with pins 5. Its clock edge trigger type is Positive Edge. The part you are looking for is included in FF/Latches. It is designed with 1bits. Despite its superior flexibility, it relies on 1 circuits to achieve it. This D flip flop is well suited for TR based on its reliable performance. The system runs on a power supply of 3.3V watts.
SN74LVC1G80DCKRG4 Features
Tape & Reel (TR) package
74LVC series
5 pins
1 Bits
3.3V power supplies
SN74LVC1G80DCKRG4 Applications
There are a lot of Texas Instruments SN74LVC1G80DCKRG4 Flip Flops applications.
- Power down protection
- Storage registers
- Synchronous counter
- ATE
- ESD protection
- Balanced 24 mA output drivers
- Counters
- Guaranteed simultaneous switching noise level
- Instrumentation
- Circuit Design