SN74LVC1G80YZAR
| Parameters | |
|---|---|
| Number of Bits | 1 |
| Clock Frequency | 160MHz |
| Propagation Delay | 5.2 ns |
| Turn On Delay Time | 1.1 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 32mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Clock Edge Trigger Type | Positive Edge |
| Width | 0.9mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Contains Lead |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 5-XFBGA, DSBGA |
| Number of Pins | 5 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LVC |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 5 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.8V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC1G80 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Inverted |
| Polarity | Inverting |
| Power Supplies | 3.3V |
| Number of Circuits | 1 |
SN74LVC1G80YZAR Overview
It is packaged in the way of 5-XFBGA, DSBGA. As part of the package Cut Tape (CT), it is embedded. In the configuration, Invertedis used as the output. There is a trigger configured with Positive Edge. It is mounted in the way of Surface Mount. A 1.65V~5.5Vsupply voltage is required for it to operate. Currently, the operating temperature is -40°C~85°C TA. There is D-Type type of electronic flip flop associated with this device. It belongs to the 74LVCseries of FPGAs. In order for it to function properly, its output frequency should not exceed 160MHz. This process consumes 10μA quiescents. A total of 5 terminations have been made. It is a member of the 74LVC1G80 family. It is powered from a supply voltage of 1.8V. The input capacitance of this JK flip flopis 3.5pF farads. The electronic device belongs to the LVC/LCX/Zfamily. There is an electronic part mounted in the way of Surface Mount. 5pins are included in its design. In this device, the clock edge trigger type is Positive Edge. It is part of the FF/Latchesbase part number family. The design is based on 1bits. 1 circuits are used to achieve its superior flexibility. As a result of its reliability, this D flip flop is ideally suited for TAPE AND REEL. The D latch operates on 3.3V volts.
SN74LVC1G80YZAR Features
Cut Tape (CT) package
74LVC series
5 pins
1 Bits
3.3V power supplies
SN74LVC1G80YZAR Applications
There are a lot of Texas Instruments SN74LVC1G80YZAR Flip Flops applications.
- 2 – Bit synchronous counter
- Frequency division
- CMOS Process
- Automotive
- Latch-up performance
- Memory
- Data transfer
- Safety Clamp
- Individual Asynchronous Resets
- Asynchronous counter
