SN74LVC2G74YEAR
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-XFBGA, DSBGA |
| Number of Pins | 8 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LVC |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC2G74 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Number of Bits | 1 |
| Clock Frequency | 140MHz |
| Turn On Delay Time | 4.1 ns |
| Family | LVC/LCX/Z |
| Logic Function | AND |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 32mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 5.4ns @ 5V, 50pF |
| Prop. Delay@Nom-Sup | 5.9 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| fmax-Min | 200 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 0.5mm |
| Width | 0.9mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Contains Lead |
SN74LVC2G74YEAR Overview
In the form of 8-XFBGA, DSBGA, it has been packaged. It is included in the package Cut Tape (CT). T flip flop uses Differentialas its output configuration. This trigger uses the value Positive Edge. It is mounted in the way of Surface Mount. A supply voltage of 1.65V~5.5V is required for operation. -40°C~85°C TAis the operating temperature. This D latch has the type D-Type. The 74LVCseries comprises this type of FPGA. A frequency of 140MHzshould not be exceeded by its output. D latch consists of 1 elements. As a result, it consumes 10μA quiescent current and is not affected by external forces. 8terminations have occurred. This D latch belongs to the family of 74LVC2G74. The power source is powered by 1.8V. This JK flip flop has a 5pFfarad input capacitance. Devices in the LVC/LCX/Zfamily are electronic devices. Surface Mount mounts this electronic component. The 8pins are designed into the board. There is a clock edge trigger type of Positive Edgeon this device. The part is included in FF/Latches. An electronic part with 1bits has been designed. It reaches 5.5Vwhen the supply voltage is maximal (Vsup). It runs on 3.3Vvolts of power.
SN74LVC2G74YEAR Features
Cut Tape (CT) package
74LVC series
8 pins
1 Bits
3.3V power supplies
SN74LVC2G74YEAR Applications
There are a lot of Texas Instruments SN74LVC2G74YEAR Flip Flops applications.
- Test & Measurement
- Divide a clock signal by 2 or 4
- Instrumentation
- Modulo – n – counter
- Count Modes
- Bounce elimination switch
- Synchronous counter
- Buffer registers
- ESCC
- Balanced Propagation Delays
