SN74LVC2G74YEPR
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-XFBGA, DSBGA |
| Number of Pins | 8 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LVC |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC2G74 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Number of Circuits | 1 |
| Number of Bits | 1 |
| Clock Frequency | 140MHz |
| Propagation Delay | 6.2 ns |
| Turn On Delay Time | 4.1 ns |
| Family | LVC/LCX/Z |
| Logic Function | AND |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 32mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 5.4ns @ 5V, 50pF |
| Prop. Delay@Nom-Sup | 5.9 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| fmax-Min | 200 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 0.5mm |
| Width | 0.9mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Contains Lead |
SN74LVC2G74YEPR Overview
In the form of 8-XFBGA, DSBGA, it has been packaged. It is included in the package Cut Tape (CT). Currently, the output is configured to use Differential. The trigger it is configured with uses Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 1.65V~5.5V volts. It is operating at -40°C~85°C TA. Logic flip flops of this type are classified as D-Type. JK flip flop is a part of the 74LVCseries of FPGAs. It should not exceed 140MHzin terms of its output frequency. During its operation, it consumes 10μA quiescent energy. It has been determined that there have been 8 terminations. The object belongs to the 74LVC2G74 family. The power source is powered by 1.8V. Its input capacitance is 5pFfarads. A device of this type belongs to the family of LVC/LCX/Z. This electronic part is mounted in the way of Surface Mount. A total of 8pins are provided on this board. A Positive Edgeclock edge trigger is used in this device. It is included in FF/Latches. This flip flop is designed with 1 Bits. It reaches the maximum supply voltage (Vsup) at 5.5V. Due to its superior flexibility, it uses 1 circuits. An electrical current of 3.3V volts is applied to it.
SN74LVC2G74YEPR Features
Cut Tape (CT) package
74LVC series
8 pins
1 Bits
3.3V power supplies
SN74LVC2G74YEPR Applications
There are a lot of Texas Instruments SN74LVC2G74YEPR Flip Flops applications.
- Computers
- Digital electronics systems
- Data Synchronizers
- Counters
- Data transfer
- Registers
- Frequency Dividers
- Instrumentation
- Data storage
- Control circuits
