SN74LVC2G79DCURG4
| Parameters | |
|---|---|
| Package / Case | 8-VFSOP (0.091, 2.30mm Width) |
| Number of Pins | 8 |
| Weight | 9.610488mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latch |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm |
| Base Part Number | 74LVC2G79 |
| Function | Standard |
| Output Type | Non-Inverted |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Clock Frequency | 160MHz |
| Propagation Delay | 5.2 ns |
| Turn On Delay Time | 1.1 ns |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 5μA |
| Current - Output High, Low | 32mA 32mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Power Supply Current-Max (ICC) | 0.005mA |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Height | 900μm |
| Length | 2.3mm |
| Width | 2mm |
| Thickness | 850μm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 week ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
SN74LVC2G79DCURG4 Overview
The package is in the form of 8-VFSOP (0.091, 2.30mm Width). Package Tape & Reel (TR)embeds it. In the configuration, Non-Invertedis used as the output. In the configuration of the trigger, Positive Edgeis used. There is an electric part mounted in the way of Surface Mount. A supply voltage of 1.65V~5.5V is required for operation. It is at -40°C~125°C TAdegrees Celsius that the system is operating. It belongs to the type D-Typeof flip flops. JK flip flop is a part of the 74LVCseries of FPGAs. A frequency of 160MHzshould be the maximum output frequency. It consumes 5μA of quiescent Currently, there are 8 terminations. The object belongs to the 74LVC2G79 family. An input voltage of 1.8Vpowers the D latch. The input capacitance of this JK flip flopis 3.5pF farads. Electronic devices of this type belong to the LVC/LCX/Zfamily. Surface Mount mounts this electronic component. The electronic flip flop is designed with pins 8. In this device, the clock edge trigger type is Positive Edge. This part is included in FF/Latch. As soon as Vsup reaches 5.5V, the maximum supply voltage is reached. In order to achieve its superior flexibility, 2 circuits are used. As a result of its reliable performance, this T flip flop is suitable for TR. The system runs on a power supply of 3.3V watts. There are 1 output lines in this JK flip flop.
SN74LVC2G79DCURG4 Features
Tape & Reel (TR) package
74LVC series
8 pins
3.3V power supplies
SN74LVC2G79DCURG4 Applications
There are a lot of Texas Instruments SN74LVC2G79DCURG4 Flip Flops applications.
- Individual Asynchronous Resets
- Balanced 24 mA output drivers
- ESCC
- Frequency Dividers
- Circuit Design
- Computers
- Buffer registers
- ESD performance
- Consumer
- Reduced system switching noise
