Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
8-XFBGA, DSBGA |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Cut Tape (CT) |
Series |
74LVC |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
8 |
Type |
D-Type |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
CMOS |
Voltage - Supply |
1.65V~5.5V |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
1.8V |
Terminal Pitch |
0.5mm |
Reach Compliance Code |
not_compliant |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74LVC2G79 |
JESD-30 Code |
R-XBGA-B8 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Non-Inverted |
Number of Elements |
2 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
3.3V |
Load Capacitance |
50pF |
Clock Frequency |
160MHz |
Turn On Delay Time |
1.1 ns |
Family |
LVC/LCX/Z |
Current - Quiescent (Iq) |
5μA |
Current - Output High, Low |
32mA 32mA |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
4.5ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3.5pF |
Propagation Delay (tpd) |
9.9 ns |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
0.5mm |
Width |
0.9mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Contains Lead |
SN74LVC2G79YEPR Overview
8-XFBGA, DSBGAis the packaging method. A package named Cut Tape (CT)includes it. T flip flop is configured with an output of Non-Inverted. In the configuration of the trigger, Positive Edgeis used. It is mounted in the way of Surface Mount. Powered by a 1.65V~5.5Vvolt supply, it operates as follows. -40°C~85°C TAis the operating temperature. D-Typedescribes this flip flop. The FPGA belongs to the 74LVC series. It should not exceed 160MHzin its output frequency. The element count is 2 . There is a consumption of 5μAof quiescent energy. The number of terminations is 8. The 74LVC2G79 family contains this object. Power is provided by a 1.8V supply. A JK flip flop with a 3.5pFfarad input capacitance is used here. It is a member of the LVC/LCX/Zfamily of D flip flop. There is an electronic part mounted in the way of Surface Mount. This device has Positive Edgeas its clock edge trigger type. There is a base part number FF/Latchesfor the RS flip flops. The maximal supply voltage (Vsup) reaches 5.5V. A reliable performance of this D flip flop makes it well suited for use in TAPE AND REEL. It runs on 3.3Vvolts of power.
SN74LVC2G79YEPR Features
Cut Tape (CT) package
74LVC series
3.3V power supplies
SN74LVC2G79YEPR Applications
There are a lot of Texas Instruments SN74LVC2G79YEPR Flip Flops applications.
- Cold spare funcion
- High Performance Logic for test systems
- Registers
- Balanced 24 mA output drivers
- Supports Live Insertion
- ESD protection
- CMOS Process
- Functionally equivalent to the MC10/100EL29
- Buffer registers
- Frequency division