SN74LVC2G80YZPR
| Parameters | |
|---|---|
| Output Type | Inverted |
| Operating Supply Voltage | 3.3V |
| Polarity | Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 32mA |
| Clock Frequency | 160MHz |
| Propagation Delay | 5.2 ns |
| Turn On Delay Time | 1.1 ns |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 5μA |
| Current - Output High, Low | 32mA 32mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Power Supply Current-Max (ICC) | 0.005mA |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Height | 500μm |
| Length | 1.25mm |
| Width | 2.25mm |
| Thickness | 310μm |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 day ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-XFBGA, DSBGA |
| Number of Pins | 8 |
| Weight | 2.296311mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LVC |
| JESD-609 Code | e1 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Termination | SMD/SMT |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC2G80 |
| Function | Standard |
| Qualification Status | Not Qualified |
SN74LVC2G80YZPR Overview
8-XFBGA, DSBGAis the packaging method. D flip flop is embedded in the Cut Tape (CT) package. It is configured with Invertedas an output. JK flip flop uses Positive Edgeas the trigger. There is an electronic component mounted in the way of Surface Mount. A voltage of 1.65V~5.5Vis required for its operation. In this case, the operating temperature is -40°C~85°C TA. There is D-Type type of electronic flip flop associated with this device. In terms of FPGAs, it belongs to the 74LVC series. Its output frequency should not exceed 160MHz. As a result, it consumes 5μA quiescent current and is not affected by external forces. In 8terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The object belongs to the 74LVC2G80 family. The D flip flop is powered by a voltage of 1.8V . There is 3.5pF input capacitance for this T flip flop. LVC/LCX/Zis the family of this D flip flop. There is an electronic component mounted in the way of Surface Mount. There are 8pins on it. The clock edge trigger type for this device is Positive Edge. The RS flip flops belongs to FF/Latches base part number. In this case, the maximum supply voltage (Vsup) reaches 5.5V. To achieve this superior flexibility, 2 circuits are used. Considering its reliability, this T flip flop is well suited for TR. The supply voltage should be maintained at 3.3V for high efficiency. The output current of 32mA makes it feature maximum design flexibility. In order for the chip to function, it has 1output lines.
SN74LVC2G80YZPR Features
Cut Tape (CT) package
74LVC series
8 pins
SN74LVC2G80YZPR Applications
There are a lot of Texas Instruments SN74LVC2G80YZPR Flip Flops applications.
- Circuit Design
- Buffered Clock
- Supports Live Insertion
- Digital electronics systems
- Consumer
- Dynamic threshold performance
- Functionally equivalent to the MC10/100EL29
- Power down protection
- Bounce elimination switch
- Shift registers
