Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 6 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.295, 7.50mm Width) |
Number of Pins |
20 |
Weight |
500.709277mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74LVC |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
CMOS |
Voltage - Supply |
1.65V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
1.8V |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74LVC374 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
3.3V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Ports |
2 |
Output Current |
24mA |
Number of Bits |
8 |
Clock Frequency |
100MHz |
Propagation Delay |
8.1 ns |
Turn On Delay Time |
1.5 ns |
Family |
LVC/LCX/Z |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
10μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
24mA 24mA |
Max Propagation Delay @ V, Max CL |
7ns @ 3.3V, 50pF |
Prop. Delay@Nom-Sup |
7 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Number of Input Lines |
2 |
Count Direction |
UNIDIRECTIONAL |
Clock Edge Trigger Type |
Positive Edge |
Height |
2.65mm |
Length |
12.8mm |
Width |
7.5mm |
Thickness |
2.35mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74LVC374ADWRE4 Overview
20-SOIC (0.295, 7.50mm Width)is the packaging method. D flip flop is embedded in the Tape & Reel (TR) package. As configured, the output uses Tri-State, Non-Inverted. There is a trigger configured with Positive Edge. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates at a voltage of 1.65V~3.6V. The operating temperature is -40°C~85°C TA. There is D-Type type of electronic flip flop associated with this device. The 74LVCseries comprises this type of FPGA. You should not exceed 100MHzin the output frequency of the device. A total of 1elements are contained within it. As a result, it consumes 10μA quiescent current. Terminations are 20. D latch belongs to the 74LVC374 family. It is powered by a voltage of 1.8V . A JK flip flop with a 4pFfarad input capacitance is used here. It belongs to the family of electronic devices known as LVC/LCX/Z. In this case, the electronic component is mounted in the way of Surface Mount. Basically, it is designed with a set of 20 pins. In this device, the clock edge trigger type is Positive Edge. This part is included in FF/Latches. The flip flop is designed with 8bits. Vsup reaches 3.6V, the maximal supply voltage. The superior flexibility of this product is achieved by using 8 circuits. This D flip flop is well suited for TR based on its reliable performance. The power supply is 3.3V. This flip flop has a total of 2ports. With a current output of 24mA , it offers maximum design flexibility. 2input lines are available for you to choose from.
SN74LVC374ADWRE4 Features
Tape & Reel (TR) package
74LVC series
20 pins
8 Bits
3.3V power supplies
SN74LVC374ADWRE4 Applications
There are a lot of Texas Instruments SN74LVC374ADWRE4 Flip Flops applications.
- Communications
- ESD performance
- Circuit Design
- Frequency Dividers
- CMOS Process
- Storage registers
- Digital electronics systems
- QML qualified product
- Instrumentation
- Balanced 24 mA output drivers