SN74LVC374APWRG4
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 week ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Weight | 76.997305mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.65mm |
| Base Part Number | 74LVC374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 24mA |
| Number of Bits | 8 |
| Clock Frequency | 100MHz |
| Propagation Delay | 8.1 ns |
| Turn On Delay Time | 1.5 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 7ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup | 7 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Input Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.2mm |
| Length | 6.5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LVC374APWRG4 Overview
The package is in the form of 20-TSSOP (0.173, 4.40mm Width). A package named Tape & Reel (TR)includes it. Currently, the output is configured to use Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. Surface Mountis positioned in the way of this electronic part. A voltage of 1.65V~3.6Vis required for its operation. Temperature is set to -40°C~85°C TA. The type of this D latch is D-Type. This type of FPGA is a part of the 74LVC series. You should not exceed 100MHzin the output frequency of the device. In total, it contains 1 elements. As a result, it consumes 10μA of quiescent current without being affected by external factors. There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. Members of the 74LVC374family make up this object. It is powered from a supply voltage of 1.8V. Its input capacitance is 4pF farads. In this case, the D flip flop belongs to the LVC/LCX/Zfamily. This electronic part is mounted in the way of Surface Mount. The 20pins are designed into the board. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. The part you are looking for is included in FF/Latches. An electronic part designed with 8bits is used in this application. 8 circuits are used to achieve its superior flexibility. As a result of its reliable performance, this T flip flop is suitable for TR. A D flip flop with 2embedded ports is available. With a current output of 24mA , it offers maximum design flexibility. 3input lines are available for you to choose from.
SN74LVC374APWRG4 Features
Tape & Reel (TR) package
74LVC series
20 pins
8 Bits
SN74LVC374APWRG4 Applications
There are a lot of Texas Instruments SN74LVC374APWRG4 Flip Flops applications.
- Single Up Count-Control Line
- ESD protection
- Computers
- Data storage
- Matched Rise and Fall
- Safety Clamp
- Circuit Design
- Buffer registers
- Parallel data storage
- Automotive
