SN74LVC374APWT
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 4 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Weight | 76.997305mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Termination | SMD/SMT |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC374 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 24mA |
| Number of Bits | 8 |
| Clock Frequency | 100MHz |
| Propagation Delay | 8.1 ns |
| Turn On Delay Time | 7 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 7ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Input Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.2mm |
| Length | 6.5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LVC374APWT Overview
As a result, it is packaged as 20-TSSOP (0.173, 4.40mm Width). You can find it in the Tape & Reel (TR)package. The output it is configured with uses Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. It is mounted in the way of Surface Mount. Powered by a 1.65V~3.6Vvolt supply, it operates as follows. Temperature is set to -40°C~85°C TA. This D latch has the type D-Type. FPGAs belonging to the 74LVCseries contain this type of chip. You should not exceed 100MHzin the output frequency of the device. The list contains 1 elements. Despite external influences, it consumes 10μAof quiescent current. The number of terminations is 20. The 74LVC374family includes it. Power is provided by a 1.8V supply. There is 4pF input capacitance for this T flip flop. It is a member of the LVC/LCX/Zfamily of D flip flop. There is an electronic part mounted in the way of Surface Mount. It is designed with 20 pins. The clock edge trigger type for this device is Positive Edge. It is part of the FF/Latchesbase part number family. There are 8bits in this flip flop. Due to its superior flexibility, it uses 8 circuits. Considering the reliability of this T flip flop, it is well suited for TR. This D flip flop is equipped with 0 ports. As a result of its output current of 24mA, it is very flexible in terms of design. 3input lines are available for you to choose from.
SN74LVC374APWT Features
Tape & Reel (TR) package
74LVC series
20 pins
8 Bits
SN74LVC374APWT Applications
There are a lot of Texas Instruments SN74LVC374APWT Flip Flops applications.
- Set-reset capability
- Memory
- Latch-up performance
- Reduced system switching noise
- Registers
- Computing
- EMI reduction circuitry
- Bus hold
- Parallel data storage
- Control circuits
