SN74LVC574AGQNR
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-VFBGA |
| Number of Pins | 20 |
| Weight | 21.687385mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LVC |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.65mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC574 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Number of Bits | 8 |
| Clock Frequency | 150MHz |
| Propagation Delay | 7.8 ns |
| Turn On Delay Time | 7 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 1.5μA |
| Current - Output High, Low | 24mA 24mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 4.6ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Input Lines | 3 |
| Clock Edge Trigger Type | Positive Edge |
| Length | 4mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Contains Lead |
SN74LVC574AGQNR Overview
The item is packaged in 20-VFBGAcases. The package Cut Tape (CT)contains it. As configured, the output uses Tri-State, Non-Inverted. The trigger it is configured with uses Positive Edge. There is an electronic component mounted in the way of Surface Mount. The supply voltage is set to 1.65V~3.6V. In the operating environment, the temperature is -40°C~85°C TA. D-Typeis the type of this D latch. In FPGA terms, D flip flop is a type of 74LVCseries FPGA. There should be no greater frequency than 150MHzon its output. There are 1 elements in it. As a result, it consumes 1.5μA of quiescent current without being affected by external factors. The number of terminations is 20. The object belongs to the 74LVC574 family. A voltage of 1.8V provides power to the D latch. A JK flip flop with a 4pFfarad input capacitance is used here. Devices in the LVC/LCX/Zfamily are electronic devices. There is an electronic part that is mounted in the way of Surface Mount. This board has 20 pins. It has a clock edge trigger type of Positive Edge. The part you are looking for is included in FF/Latches. There are 8bits in this flip flop. In order to achieve its superior flexibility, 8 circuits are used. As a result of its reliability, this D flip flop is ideally suited for TAPE AND REEL. The flip flop has 2ports embedded within it. This input has 3lines.
SN74LVC574AGQNR Features
Cut Tape (CT) package
74LVC series
20 pins
8 Bits
SN74LVC574AGQNR Applications
There are a lot of Texas Instruments SN74LVC574AGQNR Flip Flops applications.
- Set-reset capability
- CMOS Process
- Bounce elimination switch
- Buffer registers
- Frequency Divider circuits
- ATE
- Data transfer
- Shift registers
- ESCC
- Cold spare funcion
