SN74LVC574APWR
| Parameters | |
|---|---|
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.2mm |
| Length | 6.5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 2 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Weight | 76.997305mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Matte Tin (Sn) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.65mm |
| Base Part Number | 74LVC574 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 24mA |
| Number of Bits | 8 |
| Clock Frequency | 150MHz |
| Propagation Delay | 7.8 ns |
| Quiescent Current | 1.5μA |
| Turn On Delay Time | 7 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 6.8ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Input Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
SN74LVC574APWR Overview
The flip flop is packaged in a case of 20-TSSOP (0.173, 4.40mm Width). It is contained within the Tape & Reel (TR)package. T flip flop uses Tri-State, Non-Invertedas the output. There is a trigger configured with Positive Edge. Surface Mountis in the way of this electric part. The JK flip flop operates at 1.65V~3.6Vvolts. In this case, the operating temperature is -40°C~125°C TA. This logic flip flop is classified as type D-Type. This type of FPGA is a part of the 74LVC series. A frequency of 150MHzshould not be exceeded by its output. D latch consists of 1 elements. During its operation, it consumes 10μA quiescent energy. Currently, there are 20 terminations. It is a member of the 74LVC574 family. It is powered from a supply voltage of 1.8V. There is 4pF input capacitance for this T flip flop. In terms of electronic devices, this device belongs to the LVC/LCX/Zfamily of devices. Surface Mount mounts this electronic component. A total of 20pins are provided on this board. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. It is included in FF/Latches. There are 8bits in its design. The superior flexibility of this product is achieved by using 8 circuits. In light of its reliable performance, this T flip flop is well suited for TR. The flip flop has 2ports embedded within it. As a result of its output current of 24mA, it is very flexible in terms of design. A total of 3input lines have been provided. Despite external influences, it consumes 1.5μAof quiescent current.
SN74LVC574APWR Features
Tape & Reel (TR) package
74LVC series
20 pins
8 Bits
SN74LVC574APWR Applications
There are a lot of Texas Instruments SN74LVC574APWR Flip Flops applications.
- Power down protection
- Data Synchronizers
- Storage Registers
- QML qualified product
- Memory
- Parallel data storage
- Functionally equivalent to the MC10/100EL29
- Counters
- CMOS Process
- Bus hold
