SN74LVC74AD
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 6 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 14 |
| Weight | 129.387224mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Base Part Number | 74LVC74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Number of Channels | 2 |
| Load Capacitance | 50pF |
| Output Current | 24mA |
| Clock Frequency | 150MHz |
| Propagation Delay | 6 ns |
| Turn On Delay Time | 1 ns |
| Family | LVC/LCX/Z |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 5.2ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.75mm |
| Length | 8.65mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LVC74AD Overview
The flip flop is packaged in a case of 14-SOIC (0.154, 3.90mm Width). D flip flop is included in the Tubepackage. This output is configured with Differential. JK flip flop uses Positive Edgeas the trigger. Surface Mountmounts this electrical part. The JK flip flop operates with an input voltage of 1.65V~3.6V volts. A temperature of -40°C~125°C TAis used in the operation. D-Typeis the type of this D latch. In terms of FPGAs, it belongs to the 74LVC series. Its output frequency should not exceed 150MHz. T flip flop consumes 10μA quiescent energy. Terminations are 14. The object belongs to the 74LVC74 family. Power is provided by a 1.8V supply. A JK flip flop with a 5pFfarad input capacitance is used here. An electronic device belonging to the family LVC/LCX/Zcan be found here. Electronic part Surface Mountis mounted in the way. There are 14pins on it. It has a clock edge trigger type of Positive Edge. The RS flip flops belongs to FF/Latches base part number. There is a 3.6Vmaximum supply voltage (Vsup). A power supply of 3.3Vis required to operate it. With an output current of 24mA, this device offers maximum design flexibility. There are no output lines on the JK flip flop. 2 channels are available.
SN74LVC74AD Features
Tube package
74LVC series
14 pins
3.3V power supplies
SN74LVC74AD Applications
There are a lot of Texas Instruments SN74LVC74AD Flip Flops applications.
- Communications
- Event Detectors
- Dynamic threshold performance
- QML qualified product
- Bounce elimination switch
- Storage Registers
- Data storage
- Memory
- Computers
- Shift Registers
